riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
6,664 Commits 87 Branches 48 Tags 38 MiB
Commit Graph

6664 Commits

Author SHA1 Message Date
Clifford Wolf 334fd03e1c Implemented much better #x select operator 2013-03-05 12:53:40 +01:00
Clifford Wolf efbb89de1a Implemented extract -mine_max_fanout <num> option 2013-03-03 23:48:00 +01:00
Clifford Wolf f9a5fbf283 Performance optimization in subcircuit mining 2013-03-03 23:17:58 +01:00
Clifford Wolf 441e5fbfca Fixed a gcc compiler warning [-Wparentheses] 2013-03-03 22:45:06 +01:00
Clifford Wolf bc8d94b4ae Added "shared nodes" feature to the subcircuit library 2013-03-03 21:19:55 +01:00
Clifford Wolf 3ebc365c09 Added support for "extract_order" attribute to extract pass 2013-03-03 21:10:27 +01:00
Clifford Wolf d4680fd5a0 Added design->select() api and use it in extract pass 2013-03-03 20:53:24 +01:00
Clifford Wolf 40646d3516 Fixed subcircuit allowOverlap=false corner case 2013-03-03 20:33:55 +01:00
Clifford Wolf b9b990ca2c Added support for #x:<num> select stmt 2013-03-03 17:41:46 +01:00
Clifford Wolf 9368c11144 Handle known inout ports as outputs in show command 2013-03-03 17:41:09 +01:00
Clifford Wolf afb4fa1aea Fixed memory corruption in subcircuit miner 2013-03-03 13:33:02 +01:00
Clifford Wolf 45bfe26f5f Minor hotfixes (mostly gcc build fixes) 2013-03-03 13:18:37 +01:00
Clifford Wolf 65e5e1658c Added library support to celltypes class and show pass 2013-03-03 10:36:23 +01:00
Clifford Wolf 4fcb9a7b99 Implemented general handler for selection arguments 2013-03-03 10:05:37 +01:00
Clifford Wolf 5bed90ae3a Finished "extract -mine" feature 2013-03-02 18:57:14 +01:00
Clifford Wolf 5bb7578c91 More fun with subcircuit mining 2013-03-02 17:44:17 +01:00
Clifford Wolf 23eb0ba8bc Added -mine option to extract pass (not finished) 2013-03-02 16:22:37 +01:00
Clifford Wolf 8689f5d339 subcircuit library: implied allExtern for mining 2013-03-02 14:34:00 +01:00
Clifford Wolf 84cdfa55fc Added frequent subcircuit miner to subcircuit library 2013-03-02 13:53:59 +01:00
Clifford Wolf a338d1a082 Added help messages for fsm_* passes 2013-03-01 12:35:12 +01:00
Clifford Wolf f3a849512f Added help messages to memory_* passes 2013-03-01 10:17:35 +01:00
Clifford Wolf f952309c81 Added help messages to proc_* passes 2013-03-01 09:26:29 +01:00
Clifford Wolf 36954471a6 Added help messages for opt_* passes 2013-03-01 09:01:49 +01:00
Clifford Wolf 1bc0f04789 Added id2cstr API 2013-03-01 09:01:49 +01:00
Clifford Wolf 8a6b0a3520 Added help messages to ilang and verilog frontends 2013-03-01 08:03:00 +01:00
Clifford Wolf 51c2b797b3 Do not unescape identifiers starting with \$ 2013-03-01 01:10:11 +01:00
Clifford Wolf 4826dc6a87 Fixed "make qtcreator" (we now have a libs/ directory) 2013-03-01 01:08:16 +01:00
Clifford Wolf 7fccad92f7 Added more help messages 2013-03-01 00:36:19 +01:00
Clifford Wolf cd71c70b4f Improved help message for "shell" command 2013-02-28 16:53:34 +01:00
Clifford Wolf a5c4bf2161 Added help command to README (and some other README changes) 2013-02-28 14:17:57 +01:00
Clifford Wolf af561800ed Added online help for "show" and "hierarchy" commands 2013-02-28 13:59:49 +01:00
Clifford Wolf 6ac41b2bb1 Added help for command line options 2013-02-28 13:13:56 +01:00
Clifford Wolf eb2df220df Added help msg to select command (and minor improvements) 2013-02-28 12:51:30 +01:00
Clifford Wolf cb592504f4 Added more help messages (extract, abc, dfflibmap) 2013-02-28 11:14:59 +01:00
Clifford Wolf 64aa9b37d6 Added "help" command 2013-02-28 10:21:55 +01:00
Clifford Wolf c3cc9839a9 Added port swapping and compatible types to "extract" pass 2013-02-28 10:00:42 +01:00
Clifford Wolf 08c43f27af Added "extract -constports" feature 2013-02-27 23:39:10 +01:00
Clifford Wolf a6cf02bdc7 Changed default frontend for "-" to "script" (was: "ilang") 2013-02-27 23:38:38 +01:00
Clifford Wolf 500786af55 Fixed "extract" pass for non-optimized needles 2013-02-27 23:19:30 +01:00
Clifford Wolf 1bbc2b34c8 Added support for simple gates with one constant input to opt_const 2013-02-27 18:00:01 +01:00
Clifford Wolf da3d55a29c Added extract -verbose and -map ilang support 2013-02-27 17:26:32 +01:00
Clifford Wolf f28b6aff40 Implemented basic functionality of "extract" pass 2013-02-27 16:27:20 +01:00
Clifford Wolf c59d77aa30 Added support for constant signals in "extract" pass 2013-02-27 13:35:30 +01:00
Clifford Wolf b02e140030 Added "extract" pass (not functional yet) 2013-02-27 13:25:18 +01:00
Clifford Wolf 99d73fe028 Added some additional TODO items 2013-02-27 10:36:17 +01:00
Clifford Wolf a77a5136af Fixed typo in README 2013-02-27 09:45:09 +01:00
Clifford Wolf aa7daadc0a Added copyright statement to readme file 2013-02-27 09:41:04 +01:00
Clifford Wolf a321a5c412 Moved stand-alone libs to libs/ directory and added libs/subcircuit 2013-02-27 09:32:19 +01:00
Clifford Wolf 4f0c2862a0 Added support for verilog genblock[index].member syntax 2013-02-26 13:18:22 +01:00
Clifford Wolf 26a192b8c7 Merge pull request #2 from mschmoelzer/master 
"fsm_export" pass: fix KISS file generation.
 2013-02-24 00:08:07 -08:00