Kamil Rakoczy
61501e3266
Fix input/output attributes when resolving typedef of wire
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Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
2021-01-18 17:31:22 +01:00
Zachary Snow
2085d9a55d
verilog: improved support for recursive functions
2020-12-31 18:33:59 -07:00
Zachary Snow
750831e3e0
Fix elaboration of whole memory words used as indices
2020-12-26 21:47:38 -07:00
Zachary Snow
1419c8761c
Fix constants bound to redeclared function args
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The changes in #2476 ensured that function inputs like `input x;`
retained their single-bit size when instantiated with a constant
argument and turned into a localparam. That change did not handle the
possibility for an input to be redeclared later on with an explicit
width, such as `integer x;`.
2020-12-26 08:48:01 -07:00
whitequark
deff6a9546
Merge pull request #2501 from zachjs/genrtlil-tern-sign
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genrtlil: fix mux2rtlil generated wire signedness
2020-12-23 23:15:56 +00:00
whitequark
8ef6b77dc3
Merge pull request #2476 from zachjs/const-arg-width
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Fix constants bound to single bit arguments (fixes #2383 )
2020-12-23 23:15:30 +00:00
Zachary Snow
999eec5617
genrtlil: fix mux2rtlil generated wire signedness
2020-12-22 17:49:16 -07:00
Zachary Snow
8206546c45
Fix constants bound to single bit arguments ( fixes #2383 )
2020-12-22 17:01:03 -07:00
whitequark
3e67ab1ebb
Merge pull request #2479 from zachjs/const-arg-hint
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Allow constant function calls in constant function arguments
2020-12-22 01:31:25 +00:00
Zachary Snow
0d8e5d965f
Sign extend port connections where necessary
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- Signed cell outputs are sign extended when bound to larger wires
- Signed connections are sign extended when bound to larger cell inputs
- Sign extension is performed in hierarchy and flatten phases
- genrtlil indirects signed constants through signed wires
- Other phases producing RTLIL may need to be updated to preserve
signedness information
- Resolves #1418
- Resolves #2265
2020-12-18 20:33:14 -07:00
Zachary Snow
186d6df4c3
Allow constant function calls in constant function arguments
2020-12-07 13:53:27 -07:00
Julius Roob
2e23dfd96b
Return correct modname when found in cache.
2020-11-26 13:31:22 +01:00
clairexen
7e2fc2eaeb
Merge pull request #2378 from udif/pr_dollar_high_low
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Added $high(), $low(), $left(), $right()
2020-10-01 18:17:36 +02:00
clairexen
9e937961dc
Merge pull request #2330 from antmicro/arrays-fix-multirange-access
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Fix unsupported subarray access detection
2020-09-17 18:21:53 +02:00
Udi Finkelstein
7ed0e23e19
We can now handle array slices (e.g. $size(x[1]) etc. )
2020-09-17 00:55:17 +03:00
Udi Finkelstein
6de7ba02e3
Fixed comments, removed debug message
2020-09-16 10:57:06 +03:00
Udi Finkelstein
b548722bee
Added $high(), $low(), $left(), $right()
2020-09-15 20:49:52 +03:00
clairexen
a10893072b
Merge pull request #2352 from zachjs/const-func-localparam
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Allow localparams in constant functions
2020-09-01 17:31:48 +02:00
clairexen
c1a6097376
Merge pull request #2366 from zachjs/library-format
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Simple support for %l format specifier
2020-09-01 17:30:36 +02:00
clairexen
3e1840d036
Merge pull request #2353 from zachjs/top-scope
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Module name scope support
2020-09-01 17:30:09 +02:00
Zachary Snow
c7ceed3fd3
Simple support for %l format specifier
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Yosys doesn't support libraries, so this provides the same behavior as
%m, as some other tools have opted to do.
2020-08-29 13:33:31 -04:00
Zachary Snow
ecc5c23b4d
Fix constant args used with function ports split across declarations
2020-08-29 13:31:02 -04:00
Zachary Snow
6127f22788
Module name scope support
2020-08-20 20:15:08 -04:00
Zachary Snow
74abc3bbfd
Allow localparams in constant functions
2020-08-20 20:10:24 -04:00
clairexen
87b9ee330d
Merge pull request #2122 from PeterCrozier/struct_array2
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Support 2D bit arrays in structures. Optimise array indexing.
2020-08-19 17:58:37 +02:00
clairexen
22765ef0a5
Merge pull request #2339 from zachjs/display-format-0s
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Allow %0s $display format specifier
2020-08-18 17:39:01 +02:00
clairexen
4aa0dc4dc7
Merge pull request #2338 from zachjs/const-branch-finish
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Propagate const_fold through generate blocks and branches
2020-08-18 17:38:07 +02:00
clairexen
a9681f4e06
Merge pull request #2317 from zachjs/expand-genblock
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Fix generate scoping issues
2020-08-18 17:37:11 +02:00
Claire Wolf
7f767bf2b7
Merge branch 'const-func-block-var' of https://github.com/zachjs/yosys into zachjs-const-func-block-var
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Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-08-18 17:29:49 +02:00
clairexen
5ee9349647
Merge pull request #2281 from zachjs/const-real
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Allow reals as constant function parameters
2020-08-18 17:22:20 +02:00
Zachary Snow
2ee0b8ebea
Propagate const_fold through generate blocks and branches
2020-08-09 17:21:08 -04:00
Zachary Snow
96ec9acf84
Allow %0s $display format specifier
2020-08-09 17:19:49 -04:00
Lukasz Dalek
ba08c25133
Fix subarray access condition
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Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
2020-08-03 16:16:04 +02:00
Zachary Snow
c3e95eb1ab
Fix generate scoping issues
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- expand_genblock defers prefixing of items within named sub-blocks
- Allow partially-qualified references to local scopes
- Handle shadowing within generate blocks
- Resolve generate scope references within tasks and functions
- Apply generate scoping to genvars
- Resolves #2214 , resolves #1456
2020-07-31 20:32:47 -06:00
clairexen
45e96d5d87
Merge pull request #2301 from zachjs/for-loop-errors
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Clearer for loop error messages
2020-07-28 14:07:26 +02:00
Zachary Snow
58da181af9
Clearer for loop error messages
2020-07-25 10:37:16 -06:00
Zachary Snow
f69daf4830
Allow blocks with declarations within constant functions
2020-07-25 10:16:12 -06:00
Zachary Snow
59c4ad8ed3
Avoid generating wires for function args which are constant
2020-07-24 21:18:24 -06:00
Zachary Snow
f285f7b769
Allow reals as constant function parameters
2020-07-19 20:27:09 -06:00
Claire Wolf
f9ed09423e
Add AST_EDGE support to AstNode::detect_latch(), fixes #2241
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Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-07-10 18:41:13 +02:00
clairexen
8ce4f8790e
Merge pull request #2179 from splhack/static-cast
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Support SystemVerilog Static Cast
2020-07-01 16:40:20 +02:00
Zachary Snow
27cec16cda
Allow constant function calls in for loops and generate if and case
2020-06-29 16:06:17 -06:00
Kazuki Sakamoto
429d37ff41
static cast: simplify
2020-06-19 19:09:43 -07:00
Kazuki Sakamoto
185bbbe681
static cast: support changing size and signedness
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Support SystemVerilog Static Cast
- size
- signedness
- (type is not supposted yet)
Fix #535
2020-06-19 17:39:20 -07:00
whitequark
118e4caa37
Remove YS_ATTRIBUTE(unused) where present just for log_assert()/log_debug().
2020-06-19 15:48:58 +00:00
whitequark
7191dd16f9
Use C++11 final/override keywords.
2020-06-18 23:34:52 +00:00
clairexen
5c426d2bff
Merge pull request #2112 from YosysHQ/claire/fix2040
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Add latch detection for use_case_method in part-select write
2020-06-09 18:27:59 +02:00
Peter Crozier
f80b09fc58
Support 2D packed bit arrays in struct/union.
2020-06-09 13:52:09 +01:00
Peter Crozier
01ec681373
Support 2D bit arrays in structures. Optimise array indexing.
2020-06-08 20:34:52 +01:00
Peter Crozier
76c499db71
Support packed arrays in struct/union.
2020-06-07 18:33:11 +01:00