Commit Graph

9 Commits

Author SHA1 Message Date
Krystine Sherwin 40ba92e956
Docs: Reflow line length 2024-10-15 07:23:45 +13:00
Krystine Sherwin 829e02ec5b
Docs: Shorten cmd:ref 2024-10-15 07:22:04 +13:00
Krystine Sherwin 3a36612ec7
Docs: Apply invert-helper where needed 2024-05-11 10:40:54 +12:00
Rui Chen b57a803f60
chore: fix master branch refs
Signed-off-by: Rui Chen <rui@chenrui.dev>
2024-03-24 00:41:54 -04:00
Krystine Sherwin f72ddfb09d docs: Fix repo file links 2024-03-19 05:57:26 +13:00
Krystine Sherwin 9878e69d6c
Docs: tidying
- Use `:file:` role for file names, as well as `:makevar:` and `:program:`.
- Remove deprecated `linux-arm` and `linux-riscv64` oss-cad-suite targets.
- Add link to ABC.
- More (and better) links to code examples.  Formatted `:file:` text with link
  to source on github.
- Includes a few extra todos (mostly picking up inline code blocks and a couple
  intro reminders).
- Fixing a few missing `:yoscrypt:` and `:cmd:ref:` tags.
- Reflowing some paragraphs for spacing/width.
2024-01-30 13:31:00 +13:00
Krystine Sherwin 449135a9d4
Docs: adding other macro command lists
Also updates `macro_commands.py` to skip empty lines, and moves comment
stripping earlier in parsing.
2024-01-24 10:29:40 +13:00
Krystine Sherwin 1e3b90ae56
Removing typical phases doc
Moved remaining content into relevant places.
Added `load_design.rst` to more scripting.
Split fsm handling and abc out of optimization passes. Also moved things around to match the general flow previously described.
Changed generic `synth` for `prep` instead.
2023-12-07 17:14:21 +13:00
Krystine Sherwin f9ce3d1c26
WIP merging synth phases with example
Replace `typical_phases.rst` and `examples.rst` with a single `example_synth.rst`.
Also updating the counter example to match.

Aims to reduce redundancy, and simplify the getting started section.
Details on things like `proc`, `memory` and `fsm` should instead be in the advanced section (under the new `synth` subsection).
2023-12-07 13:04:46 +13:00