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2021-10-28 00:52:35 +00:00
Miodrag Milanovic
32673edfea
Revert "Compile option for enabling async load verific support"
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This reverts commit b8624ad2ae
.
2021-10-27 15:55:43 +02:00
github-actions[bot]
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github-actions[bot]
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2021-10-26 00:51:59 +00:00
Miodrag Milanovic
b8624ad2ae
Compile option for enabling async load verific support
2021-10-25 09:04:43 +02:00
github-actions[bot]
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2021-10-22 01:00:39 +00:00
github-actions[bot]
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2021-10-21 00:59:29 +00:00
Miodrag Milanovic
bf79ff5927
If verific have vhdl lib it is required by other libs
2021-10-20 13:08:08 +02:00
Miodrag Milanovic
150ce305f9
Forgot to remove from main list
2021-10-20 12:37:22 +02:00
Miodrag Milanovic
17269ae59b
Option to disable verific VHDL support
2021-10-20 10:02:58 +02:00
github-actions[bot]
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2021-10-08 00:57:28 +00:00
Marcelina Kościelnicka
4e70c30775
FfData: some refactoring.
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- FfData now keeps track of the module and underlying cell, if any (so
calling emit on FfData created from a cell will replace the existing cell)
- FfData implementation is split off to its own .cc file for faster
compilation
- the "flip FF data sense by inserting inverters in front and after"
functionality that zinit uses is moved onto FfData class and beefed up
to have dffsr support, to support more use cases
2021-10-07 04:24:06 +02:00
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github-actions[bot]
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2021-09-28 00:53:49 +00:00
Miodrag Milanovic
070cad5f4b
Prepare for next release cycle
2021-09-27 16:24:43 +02:00
github-actions[bot]
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github-actions[bot]
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2021-08-21 00:48:23 +00:00
Miodrag Milanovic
b59c427348
Make Verific extensions optional
2021-08-20 10:19:04 +02:00
github-actions[bot]
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2021-08-18 00:51:20 +00:00
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2021-08-14 00:46:42 +00:00
Rupert Swarbrick
ee2b5b7ed1
Generate an RTLIL representation of bind constructs
...
This code now takes the AST nodes of type AST_BIND and generates a
representation in the RTLIL for them.
This is a little tricky, because a binding of the form:
bind baz foo_t foo_i (.arg (1 + bar));
means "make an instance of foo_t called foo_i, instantiate it inside
baz and connect the port arg to the result of the expression 1+bar".
Of course, 1+bar needs a cell for the addition. Where should that cell
live?
With this patch, the Binding structure that represents the construct
is itself an AST::AstModule module. This lets us put the adder cell
inside it. We'll pull the contents out and plonk them into 'baz' when
we actually do the binding operation as part of the hierarchy pass.
Of course, we don't want RTLIL::Binding to contain an
AST::AstModule (since kernel code shouldn't depend on a frontend), so
we define RTLIL::Binding as an abstract base class and put the
AST-specific code into an AST::Binding subclass. This is analogous to
the AST::AstModule class.
2021-08-13 17:11:35 -06:00
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github-actions[bot]
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2021-08-10 00:52:49 +00:00
Marcelina Kościelnicka
d25b9088c8
Refactor common parts of SAT-using optimizations into a helper.
...
This also aligns the functionality:
- in all cases, the onehot attribute is used to create appropriate
constraints (previously, opt_dff didn't do it at all, and share
created one-hot constraints based on $pmux presence alone, which
is unsound)
- in all cases, shift and mul/div/pow cells are now skipped when
importing the SAT problem (previously only memory_share did this)
— this avoids creating clauses for hard cells that are unlikely
to help with proving the UNSATness needed for optimization
2021-08-09 16:54:35 +02:00
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github-actions[bot]
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github-actions[bot]
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github-actions[bot]
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2021-07-27 00:52:14 +00:00
Miodrag Milanovic
7a5ac90985
Update to latest Verific with extensions for initial assertions
2021-07-09 09:02:27 +02:00
Xiretza
75e5500d4d
Makefile: allow running multiple sanitizers at once
2021-07-05 16:42:10 +02:00
Xiretza
a189284a28
Makefile: use git/make -C instead of cd
2021-07-05 16:42:01 +02:00
Xiretza
ef68c2762c
Makefile: pass PRETTY=0 to ABC
2021-07-05 16:40:48 +02:00
Xiretza
9c31ecfab8
Makefile: don't bake DESTDIR into libyosys DT_SONAME
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DESTDIR is only used as a temporary destination for installed files
before they are packaged into an archive; the "real" installed location
is determined by PREFIX/{BIN,LIB,DAT}DIR.
2021-07-05 16:39:16 +02:00
Xiretza
18f4ae482c
Makefile: clean up PYOSYS configuration
2021-07-05 16:38:58 +02:00
Ashton Snelgrove
092f0cb01e
Include blif reader header in public facing extension header files.
2021-06-16 22:29:34 +02:00
Claire Xenia Wolf
0ada13cbe2
Use HTTPS for website links, gatecat email
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git ls-tree -r --name-only HEAD | xargs sed -i -rf ~/fixemails.sed
s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+(Shah|gatecat)\s+<(dave|david|gatecat)@(symbioticeda.com|yosyshq.com|ds0.me)>/gatecat <gatecat@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/|http://yosyshq.net/yosys/,https://yosyshq.net/yosys/,g ;
2021-06-09 12:16:56 +02:00
Claire Xenia Wolf
72787f52fc
Fixing old e-mail addresses and deadnames
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s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g ;
2021-06-08 00:39:36 +02:00
Marcelina Kościelnicka
1eea06bcc0
Add new helper class for merging FFs into cells, use for memory_dff.
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Fixes #1854 .
2021-05-23 14:46:59 +02:00
Marcelina Kościelnicka
25de8faf10
Bump version
2021-05-20 12:50:32 +02:00
Marcelina Kościelnicka
32a0ce9d68
blif: Use library cells' start_offset and upto for wideports.
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Fixes #2729 .
2021-05-08 15:50:03 +02:00
Marcelina Kościelnicka
687f381b69
Bump version
2021-03-30 02:30:17 +02:00
Lofty
f4298b057a
quicklogic: PolarPro 3 support
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Co-authored-by: Grzegorz Latosiński <glatosinski@antmicro.com>
Co-authored-by: Maciej Kurc <mkurc@antmicro.com>
Co-authored-by: Tarachand Pagarani <tpagarani@quicklogic.com>
Co-authored-by: Lalit Sharma <lsharma@quicklogic.com>
Co-authored-by: kkumar23 <kkumar@quicklogic.com>
2021-03-18 13:28:16 +01:00
Marcelina Kościelnicka
0b0e219765
Bump version
2021-03-08 20:18:11 +01:00
Marcelina Kościelnicka
0e0f84299a
Bump version
2021-03-01 19:33:05 +01:00
Marcelina Kościelnicka
5d0cc54f5c
Bump version
2021-02-26 00:24:33 +01:00
William D. Jones
9cb0bae1b2
machxo2: Add test/arch/machxo2 directory (test does not pass).
2021-02-23 17:39:58 +01:00
Yosys Bot
127484e675
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2021-02-18 00:10:06 +00:00
Yosys Bot
78684596dc
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Yosys Bot
4e741adda9
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2021-02-13 00:10:04 +00:00
Yosys Bot
17c895cbf8
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Yosys Bot
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Yosys Bot
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Yosys Bot
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Yosys Bot
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Yosys Bot
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Yosys Bot
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Yosys Bot
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Yosys Bot
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Yosys Bot
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Yosys Bot
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Yosys Bot
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Yosys Bot
339848b954
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Yosys Bot
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Yosys Bot
b0004911ca
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2021-01-05 00:10:05 +00:00
Yosys Bot
b72c294653
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2021-01-02 00:10:04 +00:00
umarcor
7f28afd3ac
makefile: fix GHDL vars, replace GHDL_DIR with GHDL_PREFIX
2020-12-30 07:06:52 +01:00
Yosys Bot
48d0aeb094
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2020-12-30 00:10:06 +00:00
whitequark
e609bc4898
Merge pull request #2514 from umarcor/feat/ghdl
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makefile: add support for built-in ghdl-yosys-plugin
2020-12-29 02:58:41 +00:00
Yosys Bot
0347b441a1
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2020-12-29 00:10:04 +00:00
umarcor
a652430c71
makefile: add support for built-in ghdl-yosys-plugin
...
Co-authored-by: Tristan Gingold <tgingold@free.fr>
Co-authored-by: whitequark <whitequark@whitequark.org>
2020-12-28 22:45:00 +01:00
umarcor
0ebce301c1
makefile: rename msys2 to msys2-32, config PREFIX
2020-12-28 02:23:04 +01:00
Yosys Bot
f48298347c
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2020-12-28 00:10:04 +00:00
Yosys Bot
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2020-12-27 00:10:10 +00:00
Yosys Bot
4491548037
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2020-12-24 00:10:08 +00:00
Yosys Bot
832f6aa777
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2020-12-23 00:10:07 +00:00
Yosys Bot
b62a892b2f
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Yosys Bot
b90d51e35d
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2020-12-20 00:10:10 +00:00
Yosys Bot
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Yosys Bot
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Yosys Bot
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Yosys Bot
442d19f647
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Yosys Bot
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2020-12-09 00:10:04 +00:00
Yosys Bot
95c6086681
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2020-12-04 00:10:06 +00:00
Yosys Bot
5a15307926
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2020-12-03 00:10:09 +00:00
whitequark
975b2d4283
Merge pull request #2455 from gsomlo/gls-fedpkg-fixes
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Fixes for building Fedora distro RPMs of yosys
2020-12-02 22:19:52 +00:00
Yosys Bot
d021f4b400
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2020-12-02 00:10:06 +00:00
Gabriel Somlo
6a328e7032
fixup over commit 829b5cca
to re-enable ABCEXTERNAL support
2020-11-26 06:12:12 -05:00
Yosys Bot
2116c58581
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2020-11-26 00:10:09 +00:00
whitequark
c6b5b18a30
Merge pull request #2442 from cr1901/sccache
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Makefile: Add disabled-by-default ENABLE_SCCACHE config option.
2020-11-25 02:48:39 +00:00
William D. Jones
9431033921
Makefile: Update ABCREV to bring in sccache fixes.
2020-11-24 21:32:27 -05:00
Yosys Bot
88c47a380b
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2020-11-25 00:10:05 +00:00
Yosys Bot
949eb95593
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2020-11-21 00:10:06 +00:00
William D. Jones
296a23f489
Makefile: Add disabled-by-default ENABLE_SCCACHE config option.
2020-11-19 13:23:54 -05:00
Yosys Bot
5b35d953f7
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2020-11-19 00:10:10 +00:00
Yosys Bot
58e8901fee
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2020-11-17 00:10:06 +00:00
Yosys Bot
71ca9a8253
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2020-11-11 00:10:17 +00:00
Yosys Bot
014c7e26b8
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2020-11-08 00:10:06 +00:00
whitequark
630be7e11a
Merge pull request #2414 from zeldin/abc-depend-clang-fix
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Prevent CXXFLAGS from leaking to abc Makefile
2020-11-07 18:48:03 +00:00
Marcus Comstedt
5594594e16
Prevent CXXFLAGS from leaking to abc Makefile
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This fixes an issue with abc/depends.sh when the compiler is clang.
2020-11-07 16:02:49 +01:00
Yosys Bot
e7f36d01e4
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2020-11-03 00:10:05 +00:00
Yosys Bot
d9af3cadf8
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2020-11-02 00:10:06 +00:00
Yosys Bot
56054f2ce3
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2020-11-01 00:10:05 +00:00
Yosys Bot
166a84bdb8
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2020-10-31 00:10:15 +00:00
Yosys Bot
e2a39bb1e7
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2020-10-25 00:10:05 +00:00
Yosys Bot
623526d17d
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2020-10-23 00:10:07 +00:00
Yosys Bot
1a7a597e07
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2020-10-22 00:10:06 +00:00
Marcelina Kościelnicka
8720482ebd
Add new helper structures to represent memories.
2020-10-21 17:51:20 +02:00
Yosys Bot
c76d533e07
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2020-10-21 00:10:07 +00:00
Yosys Bot
06347b119b
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2020-10-20 00:10:06 +00:00
Miodrag Milanović
ac0bd2ffc4
Merge pull request #2397 from daveshah1/nexus
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synth_nexus: Initial implementation
2020-10-19 11:20:56 +02:00
Yosys Bot
4c925a3214
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2020-10-16 00:10:07 +00:00
David Shah
4d584d9319
synth_nexus: Initial implementation
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Signed-off-by: David Shah <dave@ds0.me>
2020-10-15 08:52:15 +01:00
Yosys Bot
84e9fa7648
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2020-10-13 00:10:06 +00:00
Yosys Bot
c403c984dd
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Yosys Bot
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2020-10-06 00:10:06 +00:00
Yosys Bot
5aa35b8992
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2020-10-03 00:10:06 +00:00
Yosys Bot
a1a3e686c7
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2020-10-02 00:10:05 +00:00
Yosys Bot
f9ed9786bf
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2020-10-01 00:10:08 +00:00
Miodrag Milanovic
9e00f3f141
Fixed installation dir override for Python scripts
2020-09-30 07:47:36 +02:00
Yosys Bot
5a3ac39f5f
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2020-09-30 00:10:09 +00:00