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582 Commits

Author SHA1 Message Date
Eddie Hung 4883391b63 Merge remote-tracking branch 'origin/master' into xaig 2019-04-22 11:19:52 -07:00
Clifford Wolf 8ed4a53d99
Merge pull request #951 from YosysHQ/clifford/logdebug 
Add log_debug() framework
 2019-04-22 20:09:51 +02:00
Eddie Hung e300b1922c Merge remote-tracking branch 'origin/master' into xc7srl 2019-04-22 10:36:27 -07:00
Clifford Wolf e158ea2097 Add log_debug() framework 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-22 17:25:52 +02:00
whitequark aeeefc32d8 attrmap: extend -remove to allow removing attributes with any value. 
Currently, `-remove foo` would only remove an attribute `foo = ""`,
which doesn't work on an attribute like `src` that may have any
value. Extend `-remove` to handle both cases. `-remove foo=""` has
the old behavior, and `-remove foo` will remove the attribute with
whatever value it may have, which is still compatible with the old
behavior.
 2019-04-22 14:18:15 +00:00
Eddie Hung d06d4f35c3 Merge remote-tracking branch 'origin/clifford/libwb' into xaig 2019-04-21 18:10:46 -07:00
Clifford Wolf 7b35d57592 Disable blackbox detection in techmap files 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-22 02:07:36 +02:00
Eddie Hung d99422411f Use new pmux2shiftx from #944, remove my old attempt 2019-04-21 14:16:34 -07:00
Eddie Hung 9dc11cd842 Merge remote-tracking branch 'origin/master' into xc7srl 2019-04-20 17:24:06 -07:00
Eddie Hung caec7f9d2c Merge remote-tracking branch 'origin/master' into xaig 2019-04-20 12:23:49 -07:00
Clifford Wolf f84a84e3f1
Merge pull request #943 from YosysHQ/clifford/whitebox 
[WIP] Add "whitebox" attribute, add "read_verilog -wb"
 2019-04-20 20:51:54 +02:00
Eddie Hung b25254020c Merge remote-tracking branch 'origin/pmux2shiftx' into xc7srl 2019-04-20 10:44:01 -07:00
Eddie Hung 13ad19482f Merge remote-tracking branch 'origin' into xc7srl 2019-04-20 10:41:43 -07:00
Clifford Wolf f3ad8d680a Add "techmap -wb", use in formal flows 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 11:23:24 +02:00
Clifford Wolf b7445ef387 Check blackbox attribute in techmap/simplemap 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 11:10:05 +02:00
Eddie Hung 9dec3d9978 Spelling fixes 2019-04-19 14:00:22 +02:00
Eddie Hung 290a798cec Ignore 'whitebox' attr in flatten with "-wb" option 2019-04-18 10:32:00 -07:00
Eddie Hung c997a77014 Ignore 'whitebox' attr in flatten with "-wb" option 2019-04-18 10:19:45 -07:00
Eddie Hung 070a2d2fd6 Fix abc's remap_name to not ignore [^0-9] when extracting sid 2019-04-18 09:55:03 -07:00
Eddie Hung 8fe0a961b3 Merge remote-tracking branch 'origin/clifford/whitebox' into xaig 2019-04-18 09:00:06 -07:00
Eddie Hung 9aa94370a5 ABC to call retime all the time 2019-04-18 08:46:41 -07:00
Clifford Wolf f4abc21d8a Add "whitebox" attribute, add "read_verilog -wb" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-18 17:45:47 +02:00
Eddie Hung a20ed260e1 Skip if abc_box_id earlier 2019-04-17 16:36:03 -07:00
Eddie Hung abcd3103ff Do not print slack histogram 2019-04-17 15:11:14 -07:00
Eddie Hung fd89c1056e Working ABC9 script 2019-04-17 12:33:32 -07:00
Eddie Hung ae2653c50f abc9 to output some more info 2019-04-16 16:39:16 -07:00
Eddie Hung 55a3638c71 Port from xc7mux branch 2019-04-16 15:01:45 -07:00
Eddie Hung fc5fda595d Merge branch 'xaig' into xc7mux 2019-04-16 13:15:53 -07:00
Eddie Hung afcb86c3d1 abc9 to call "setundef -zero" behaving as for abc 2019-04-16 13:10:13 -07:00
Eddie Hung 98c297fabf ABC to read_box before reading netlist 2019-04-16 12:44:10 -07:00
Eddie Hung a2b106135b Do not call abc on modules with abc_box_id attr 2019-04-16 11:19:42 -07:00
Eddie Hung 538592067e Merge branch 'xaig' into xc7mux 2019-04-15 22:04:20 -07:00
Eddie Hung 9bfcd80063 Handle __dummy_o__ and __const[01]__ in read_aiger not abc 2019-04-12 18:21:16 -07:00
Eddie Hung 482a60825b abc to ignore __dummy_o__ and __const[01]__ when re-integrating 2019-04-12 18:16:50 -07:00
Eddie Hung 88d43a519b Use -map instead of -symbols for aiger 2019-04-12 16:29:14 -07:00
Eddie Hung 941365b4bb Comment out 2019-04-12 12:29:04 -07:00
Eddie Hung 04e466d5e4 Add support for synth_xilinx -abc9 and ignore abc9 -dress opt 2019-04-12 12:28:37 -07:00
Eddie Hung 3c1f1a6605 Fix ordering of when to insert zero index 2019-04-11 16:25:59 -07:00
Eddie Hung 53513c52df Merge remote-tracking branch 'origin/pmux2shiftx' into xc7mux 2019-04-11 16:21:01 -07:00
Eddie Hung f587950bde More unused 2019-04-11 16:20:43 -07:00
Eddie Hung 35181a7866 Merge remote-tracking branch 'origin/pmux2shiftx' into xc7mux 2019-04-11 16:18:45 -07:00
Eddie Hung b15b410b41 Remove unused 2019-04-11 16:18:01 -07:00
Eddie Hung b1f1db2fcf Fixes 2019-04-11 16:17:09 -07:00
Eddie Hung e8c26f2839 WIP 2019-04-11 15:52:04 -07:00
Eddie Hung 09e7eb7aed Spelling fixes 2019-04-11 15:09:13 -07:00
Eddie Hung 5f4024ffd2 Revert "abc -dff now implies "-D 0" otherwise retiming doesn't happen" 
This reverts commit 19271bd996.
 2019-04-10 08:31:40 -07:00
Eddie Hung 78d35a86c0 Revert ""&nf -D 0" fails => use "-D 1" instead" 
This reverts commit 3c253818ca.
 2019-04-10 08:31:35 -07:00
Eddie Hung d536379c62 Add "-lut <file>" support to abc9 2019-04-09 14:31:31 -07:00
Eddie Hung 7e304c362b Add "-box" option to abc9 2019-04-09 10:58:06 -07:00
Eddie Hung bd523abef5 Add 'setundef -zero' call prior to aigmap in abc9 2019-04-09 10:32:58 -07:00
Eddie Hung 3b6f85b0a6 Comment out 2019-04-09 10:09:43 -07:00
Eddie Hung 3fc474aa73 Add support for synth_xilinx -abc9 and ignore abc9 -dress opt 2019-04-09 10:06:44 -07:00
Eddie Hung 12c34136ba More space fixing 2019-04-08 16:40:17 -07:00
Eddie Hung bca3cf6843 Merge branch 'master' into xaig 2019-04-08 16:31:59 -07:00
Eddie Hung 6797f6b6c4 $_XILINX_SHREG_ to preserve src attribute 2019-04-08 16:24:20 -07:00
Eddie Hung 93b1621911 Cope with undoing #895 2019-04-08 15:57:07 -07:00
Eddie Hung d3930ca79e Revert "Remove handling for $pmux, since #895" 
This reverts commit aa693d5723.
 2019-04-08 12:01:06 -07:00
Eddie Hung 1d526b7f06 Call shregmap twice -- once for variable, another for fixed 2019-04-05 17:35:49 -07:00
Eddie Hung 4afcad70e2 Merge branch 'eddie/fix_retime' into xc7srl 2019-04-05 16:30:17 -07:00
Eddie Hung d559023007 Fix S0 -> S1 2019-04-05 16:28:14 -07:00
Eddie Hung 0364a5d811 Merge branch 'eddie/fix_retime' into xc7srl 2019-04-05 15:46:18 -07:00
Eddie Hung 3c253818ca "&nf -D 0" fails => use "-D 1" instead 2019-04-05 15:30:19 -07:00
Eddie Hung 19271bd996 abc -dff now implies "-D 0" otherwise retiming doesn't happen 2019-04-05 14:42:25 -07:00
Eddie Hung aa693d5723 Remove handling for $pmux, since #895 2019-04-03 08:35:32 -07:00
Eddie Hung d8465590ac Merge remote-tracking branch 'origin/master' into xc7srl 2019-04-03 03:36:11 -07:00
Niels Moseley 263ab60b43 Liberty file parser now accepts superfluous ; 2019-03-27 15:17:58 +01:00
Niels Moseley 487cb45b87 Liberty file parser now accepts superfluous ; 2019-03-27 15:15:53 +01:00
Eddie Hung 6b90d3cf6c Merge remote-tracking branch 'origin/master' into xc7srl 2019-03-25 13:17:22 -07:00
Niels Moseley 1f7f54e68e spaces -> tabs 2019-03-25 14:12:04 +01:00
Niels Moseley 9d9cc8a314 EOL is now accepted as ';' replacement on lines that look like: feature_xyz(option) 2019-03-25 12:15:10 +01:00
Niels Moseley 3b3b77291a Updated the liberty parser to accept [A:B] ranges (AST has not been updated). Liberty parser now also accepts key : value pair lines that do not end in ';'. 2019-03-24 22:54:18 +01:00
Eddie Hung bf83c074c8 Cope with SHREG not having E port; Revert $pmux fine tune 2019-03-23 16:09:38 -07:00
Eddie Hung 098bd5758f Add support for SHREGMAP+$mux, also fine tune $pmux 2019-03-22 23:22:19 -07:00
Eddie Hung 0895093c7c Leftover printf 2019-03-22 19:14:04 -07:00
Eddie Hung 456295eb66 Fixes for multibit 2019-03-22 18:32:42 -07:00
Eddie Hung 03d108cd1f Working for 1 bit 2019-03-22 17:46:49 -07:00
Eddie Hung 5597270b9e Opt 2019-03-21 10:20:27 -07:00
Eddie Hung 2b911e270b Fix spacing 2019-03-20 12:28:39 -07:00
Eddie Hung 505e4c2d59 Revert $__SHREG_ to orig; use $__XILINX_SHREG for variable length 2019-03-19 21:58:05 -07:00
Eddie Hung 5445cd4d00 Add support for variable length Xilinx SRL > 128 2019-03-19 17:44:33 -07:00
Eddie Hung 4cd8f02973 shregmap -tech xilinx to delete $shiftx for var length SRL 2019-03-19 15:05:08 -07:00
Eddie Hung 0ea7eba5f1 Make output port a non chain user 2019-03-19 13:08:43 -07:00
Eddie Hung ed32119d13 Fix shregmap to correctly recognise non chain users; cleanup 2019-03-18 16:12:19 -07:00
Eddie Hung b94db54664 shiftx NULL pointer check 2019-03-18 13:35:54 -07:00
Eddie Hung d6d9ef0fee Cleanup 2019-03-16 12:49:46 -07:00
Eddie Hung fadeadb8c8 Only accept <128 for variable length, only if $shiftx exclusive 2019-03-16 08:51:13 -07:00
Eddie Hung 06f8f2654a Working 2019-03-15 19:13:40 -07:00
Eddie Hung 8af9979aab Revert "Add shregmap -init_msb_first and use in synth_xilinx" 
This reverts commit 26ecbc1aee.
 2019-03-14 09:01:48 -07:00
Eddie Hung f1a8e8a480 Merge remote-tracking branch 'origin/master' into xc7srl 2019-03-14 08:59:19 -07:00
Eddie Hung 26ecbc1aee Add shregmap -init_msb_first and use in synth_xilinx 2019-03-14 08:10:02 -07:00
Eddie Hung f7c7003a19 Merge remote-tracking branch 'origin/master' into xaig 2019-02-26 13:16:03 -08:00
Eddie Hung 7cac3b1c8b abc9 -- multiple connections for inouts 2019-02-26 12:18:28 -08:00
Larry Doolittle 61fc411c5d Clean up some whitepsace outliers 2019-02-26 09:39:46 -08:00
Eddie Hung 967297cd57 abc9 cleanup 2019-02-25 18:40:53 -08:00
Eddie Hung 721f6a14fb read_aiger to accept empty string for clk_name, passable only if no latches 2019-02-25 15:34:02 -08:00
Eddie Hung 0ca3fd6a1c abc9 not to clean after aigmap 2019-02-25 15:31:52 -08:00
Eddie Hung 51f28a6747 abc9 to call "clean" once at the end of all abc9_module() calls 2019-02-25 12:55:47 -08:00
Eddie Hung d56f02d1fc abc9 to use AIGER symbol table, as opposed to map file 2019-02-21 17:03:40 -08:00
Eddie Hung 2811d66dea Revert "abc9 to write_xaiger -symbols, not -map" 
This reverts commit 04429f8152.
 2019-02-21 14:58:40 -08:00
Eddie Hung 7ad9628f07 Remove irrelevant citations 2019-02-21 14:41:11 -08:00
Eddie Hung 085ed9f487 Add attribution 2019-02-21 14:40:13 -08:00
Eddie Hung 875a02a6f2 abc9 to not select anything extra, and pop selection after final clean 2019-02-21 14:38:52 -08:00
Eddie Hung 04429f8152 abc9 to write_xaiger -symbols, not -map 2019-02-21 14:28:36 -08:00
Eddie Hung 3307295488 Merge branch 'read_aiger' into xaig 2019-02-21 14:27:32 -08:00
Eddie Hung 7f8f36273a abc9 to use &mfs 2019-02-21 13:16:24 -08:00
Eddie Hung 6b96df41bc abc9 to only disconnect output ports of AND and NOT gates 2019-02-21 11:15:47 -08:00
Eddie Hung 7f26043caf ABC -> ABC9 2019-02-20 17:36:57 -08:00
Eddie Hung e5b8bb9faa abc9 to disconnect mapped_mods POs correctly, and do not count $_NOT_ 2019-02-20 17:33:35 -08:00
Eddie Hung 32853b1f8d lut/not/and suffix to be ${lut,not,and} 2019-02-20 16:30:30 -08:00
Eddie Hung 2ca83005fb abc9 to cope with multiple modules 2019-02-20 12:56:15 -08:00
Eddie Hung d6b317b349 abc9 to use & syntax for -fast, and name fixes 2019-02-20 12:40:17 -08:00
Eddie Hung 62e5ff9ba8 abc9 to cope with indexed wires when creating $lut from $_NOT_ 2019-02-19 16:06:03 -08:00
Eddie Hung 8158bc3f99 abc9 to replace $_NOT_ with $lut 2019-02-19 12:30:20 -08:00
Eddie Hung 45d49d5d14 Get rid of debugging stuff in abc9 2019-02-16 22:25:22 -08:00
Eddie Hung f853b2f3c1 abc9 to write_aiger with -O option, and ignore dummy outputs 2019-02-16 20:09:40 -08:00
Eddie Hung d8c4d4e6c7 abc9 to handle comb loops, cope with constant outputs, disconnect using new wire 2019-02-16 13:47:38 -08:00
Eddie Hung d4545d415b abc9 to cope with non-wideports, count cells properly 2019-02-16 08:53:06 -08:00
Eddie Hung f8d0134598 Move lookup inside if 2019-02-15 15:23:26 -08:00
Eddie Hung a786ac4d53 Refactor 2019-02-15 13:00:13 -08:00
Eddie Hung 914546efd9 Cope with width != 1 when re-mapping cells 2019-02-15 12:55:52 -08:00
Eddie Hung 956ee545c5 abc9 to stitch results with CI/CO properly 2019-02-15 11:52:34 -08:00
Eddie Hung 206f11dca3 Fix stitching 2019-02-13 17:04:23 -08:00
Eddie Hung f0f5d8a5cc Merge remote-tracking branch 'origin/read_aiger' into xaig 2019-02-13 14:09:36 -08:00
Eddie Hung 87f059adf7 Rip out some more stuff 2019-02-13 10:44:52 -08:00
Eddie Hung 045f7763ae Rip out unused functions in abc9 2019-02-12 16:25:22 -08:00
Eddie Hung b3341b4abb WIP for ABC with aiger 2019-02-12 09:31:22 -08:00
Eddie Hung c23e3f0751 Missing headers for Xcode? 2019-02-12 09:24:13 -08:00
Eddie Hung 5a0a5aae4f Compile abc9 2019-02-08 13:58:47 -08:00
Eddie Hung e25a22015f Copy abc.cc to abc9.cc 2019-02-08 13:23:54 -08:00
David Shah 58c22dae31 abc: Improved recovered netnames, also preserve src on nets with dress 
Signed-off-by: David Shah <davey1576@gmail.com>
 2019-02-06 22:23:13 +01:00
David Shah 8524a479b1 abc: Preserve naming through ABC using 'dress' command 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-06 22:23:13 +01:00
whitequark e792bd56b7 flowmap: clean up terminology. 
* "map": group gates into LUTs;
  * "pack": replace gates with LUTs.

This is important because we have FlowMap and DF-Map, and currently
our messages are ambiguous.

Also clean up some other log messages while we're at it.
 2019-01-08 02:05:06 +00:00
whitequark 211c26a4c9 flowmap: implement depth relaxation. 2019-01-08 01:13:05 +00:00
whitequark 8b44198e23 flowmap: construct a max-volume max-flow min-cut, not just any one. 2019-01-06 19:51:37 +00:00
whitequark 2fcc1ee72e flowmap: add -minlut option, to allow postprocessing with opt_lut. 2019-01-04 21:18:03 +00:00
whitequark 9bc5cf0844 flowmap: cleanup for clarity. NFCI. 2019-01-04 13:04:20 +00:00
whitequark fd21564deb flowmap: improve debug graph output. NFC. 2019-01-04 03:30:04 +00:00
whitequark 7850a0c28a flowmap: add link to longer version of paper. NFC. 2019-01-04 02:33:10 +00:00
whitequark 07af772a72 flowmap: new techmap pass. 2019-01-03 14:28:19 +00:00
Icenowy Zheng 256fb8c95c Add "dffinit -noreinit" parameter 
Sometimes the FF cell might be initialized during the map process, e.g.
some FPGA platforms (Anlogic Eagle and Lattice ECP5 for example) has
only a "SR" pin for a FF for async reset, that resets the FF to the
initial value, which means the async reset value should be set as the
initial value. In this case the DFFINIT pass shouldn't reinitialize it
to a different value, which will lead to error.

Add a "-noreinit" parameter for the safeguard. If a FF is not
technically initialized before DFFINIT pass, the default value should be
set to x.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
 2018-12-18 23:10:40 +08:00
Icenowy Zheng fec8b3c81f Add "dffinit -strinit high low" 
On some platforms the string to initialize DFF might not be "high" and
"low", e.g. with Anlogic TD it's "SET" and "RESET".

Add a "-strinit" parameter for dffinit to allow specify the strings used
for high and low.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
 2018-12-18 15:37:43 +08:00
Clifford Wolf 2641a3089b
Revert "Proof-of-concept: preserve naming through ABC using dress" 2018-12-16 21:27:31 +01:00
Clifford Wolf 0d9c850a07
Merge pull request #735 from daveshah1/trifixes 
deminout fixes
 2018-12-16 16:02:21 +01:00
Clifford Wolf a1fb5b1e4b
Merge pull request #714 from daveshah1/abc_preserve_naming 
Proof-of-concept: preserve naming through ABC using dress
 2018-12-16 15:41:30 +01:00
David Shah 4c59447168 deminout: Consider $tribuf cells 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-12 17:17:40 +00:00
David Shah d3fe9465f3 deminout: Don't demote constant-driven inouts to inputs 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-12 16:50:46 +00:00
David Shah 1dfb2fecab abc: Preserve naming through ABC using 'dress' command 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 15:05:07 +00:00
whitequark d1f2cb01dc lut2mux: handle 1-bit INIT constant in $lut cells. 
This pass already handles INIT constants shorter than 2^width, but
that was not done for the recursion base case.
 2018-12-05 19:27:48 +00:00
Clifford Wolf c800e3bb16 Fix typo 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-12-04 23:30:23 +01:00
Sylvain Munaut 8d3ab626ea dff2dffe: Add option for unmap to only remove DFFE with low CE signal use 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-27 21:50:42 +01:00