Commit Graph

5 Commits

Author SHA1 Message Date
Marcin Kościelnicki dadaf7ed78 xilinx: Test our DSP48A/DSP48A1 simulation models. 2019-12-23 20:36:43 +01:00
David Shah f0f352e971 [wip] sim model testing
Signed-off-by: David Shah <dave@ds0.me>
2019-08-08 10:05:11 +01:00
David Shah ccfb4ff2a9 [wip] sim model testing
Signed-off-by: David Shah <dave@ds0.me>
2019-08-08 09:31:34 +01:00
Clifford Wolf d19866615b Added Xilinx test case for initialized brams 2015-04-06 13:27:11 +02:00
Clifford Wolf 9ea2511fe8 Towards Xilinx bram support 2015-01-05 13:59:04 +01:00