riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
13,757 Commits 92 Branches 49 Tags 38 MiB
Commit Graph

3 Commits

Author SHA1 Message Date
Miodrag Milanovic 627fbc3477 Fix Windows build by forcing initialization order, fixes #4068 2024-01-02 11:26:48 +01:00
Martin Povišer 7d738b07da ql_dsp_*: Clean up 
Clean up the code up to Yosys standards. Drop detection of
QL_DSP2_MULTADD in io_regs since those cells can't be inferred with
the current flow anyway.
 2023-12-04 15:52:02 +01:00
N. Engelhardt 20d864bbde add dsp inference 2023-12-04 15:52:02 +01:00