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yosys
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3,142 Commits 76 Branches 48 Tags 62 MiB
Commit Graph

16 Commits

Author SHA1 Message Date
Clifford Wolf 0bc95f1e04 Added "yosys -D" feature 2016-04-21 23:28:37 +02:00
Clifford Wolf 6c84341f22 Fixed trailing whitespaces 2015-07-02 11:14:30 +02:00
William Speirs 31267a1ae8 Header changes so it will compile on VS 2014-10-17 11:41:36 +02:00
Clifford Wolf 0b9282a779 Added make_temp_{file,dir}() and remove_directory() APIs 2014-10-12 12:11:57 +02:00
Clifford Wolf b1596bc0e7 Added run_command() api to replace system() and popen() 2014-10-12 10:57:15 +02:00
Clifford Wolf 0a651f112f Disabled vhdl2verilog command for win32 builds 2014-10-11 10:46:19 +02:00
Ruben Undheim 79cbf9067c Corrected spelling mistakes found by lintian 2014-09-06 08:47:06 +02:00
Clifford Wolf 19cff41eb4 Changed frontend-api from FILE to std::istream 2014-08-23 15:03:55 +02:00
Clifford Wolf 1cb25c05b3 Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace 2014-07-31 13:19:47 +02:00
Clifford Wolf 7bd2d1064f Using log_assert() instead of assert() 2014-07-28 11:27:48 +02:00
Clifford Wolf 0f9ca49dc6 Added passing of various options to vhdl2verilog 2014-07-12 10:02:39 +02:00
Clifford Wolf 91704a7853 Merged a few fixes for non-posix systems from github.com/Siesh1oo/yosys 
(see https://github.com/cliffordwolf/yosys/pull/28)
 2014-03-11 14:24:24 +01:00
Clifford Wolf 4d07f88258 Fixed gcc compiler warning 2014-03-06 16:37:19 +01:00
Clifford Wolf ef90236a5d Fixed vhdl2verilog temp dir name 2014-03-01 17:48:15 +01:00
Clifford Wolf 04999f4af0 Fixed vhdl2verilog help message 2014-03-01 17:47:19 +01:00
Clifford Wolf 0a60f95224 Added vhdl2verilog 2014-02-21 18:59:49 +01:00