Henner Zeller
3aa4484a3c
Consistent use of 'override' for virtual methods in derived classes.
...
o Not all derived methods were marked 'override', but it is a great
feature of C++11 that we should make use of.
o While at it: touched header files got a -*- c++ -*- for emacs to
provide support for that language.
o use YS_OVERRIDE for all override keywords (though we should probably
use the plain keyword going forward now that C++11 is established)
2018-07-20 23:51:06 -07:00
Clifford Wolf
0bc95f1e04
Added "yosys -D" feature
2016-04-21 23:28:37 +02:00
Andrew Zonenberg
dd7204c0bd
Fixed typo in log message
2016-03-30 20:30:03 -07:00
Clifford Wolf
1d83854d84
Bugfixes in handling of "keep" attribute on wires
2015-10-15 14:57:28 +02:00
Clifford Wolf
6c84341f22
Fixed trailing whitespaces
2015-07-02 11:14:30 +02:00
Clifford Wolf
a8f4a099b5
Using design->selected_modules() in opt_*
2015-02-03 23:45:01 +01:00
Clifford Wolf
74e1de1fac
Fixed opt_muxtree performance bug
2015-01-21 16:44:07 +01:00
Clifford Wolf
f630868bc9
Improvements in opt_muxtree
2015-01-18 12:57:36 +01:00
Clifford Wolf
d3b35017f8
More opt_muxtree cleanups
2015-01-18 12:13:18 +01:00
Clifford Wolf
61192514e3
Various cleanups and improvements in opt_muxtree
2015-01-18 11:17:56 +01:00
Clifford Wolf
a95c229e12
Fixed a bug in opt_muxtree for "mux forests"
2015-01-17 13:56:53 +01:00
Clifford Wolf
3628ca989c
Improved opt_muxtree
2015-01-17 12:05:19 +01:00
Clifford Wolf
35fbc0b35f
Do not the 'z' modifier in format string (another win32 fix)
2014-10-11 11:42:08 +02:00
Clifford Wolf
f9a307a50b
namespace Yosys
2014-09-27 16:17:53 +02:00
Clifford Wolf
2a1b08aeb3
Added design->scratchpad
2014-08-30 19:37:12 +02:00
Clifford Wolf
13f2f36884
RIP $safe_pmux
2014-08-14 11:39:46 +02:00
Clifford Wolf
cdae8abe16
Renamed port access function on RTLIL::Cell, added param access functions
2014-07-31 16:38:54 +02:00
Clifford Wolf
7bd2d1064f
Using log_assert() instead of assert()
2014-07-28 11:27:48 +02:00
Clifford Wolf
49f72421d5
Using new obj iterator API in a few places
2014-07-27 11:32:42 +02:00
Clifford Wolf
10e5791c5e
Refactoring: Renamed RTLIL::Design::modules to modules_
2014-07-27 11:18:30 +02:00
Clifford Wolf
4c4b602156
Refactoring: Renamed RTLIL::Module::cells to cells_
2014-07-27 01:51:45 +02:00
Clifford Wolf
f9946232ad
Refactoring: Renamed RTLIL::Module::wires to wires_
2014-07-27 01:49:51 +02:00
Clifford Wolf
b7dda72302
Changed users of cell->connections_ to the new API (sed command)
...
git grep -l 'connections_' | xargs sed -i -r -e '
s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g;
s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g;
s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g;
s/(->|\.)connections_.push_back/\1connect/g;
s/(->|\.)connections_/\1connections()/g;'
2014-07-26 15:58:23 +02:00
Clifford Wolf
cc4f10883b
Renamed RTLIL::{Module,Cell}::connections to connections_
2014-07-26 11:58:03 +02:00
Clifford Wolf
2bec47a404
Use only module->addCell() and module->remove() to create and delete cells
2014-07-25 17:56:19 +02:00
Clifford Wolf
a62c21c9c6
Removed RTLIL::SigSpec::expand() method
2014-07-23 19:34:51 +02:00
Clifford Wolf
4b4048bc5f
SigSpec refactoring: using the accessor functions everywhere
2014-07-22 20:39:37 +02:00
Clifford Wolf
a233762a81
SigSpec refactoring: renamed chunks and width to __chunks and __width
2014-07-22 20:39:37 +02:00
Clifford Wolf
9a34486bfb
Fixed performance problem in opt_mux with nets driven by many conflicting drivers
2014-03-19 10:05:01 +01:00
Clifford Wolf
e5b974fa2a
Cleanups and bugfixes in response to new internal cell checker
2013-11-11 00:39:45 +01:00
Johann Glaser
cd8008bda0
fixed typos
2013-03-18 07:28:31 +01:00
Clifford Wolf
45bfe26f5f
Minor hotfixes (mostly gcc build fixes)
2013-03-03 13:18:37 +01:00
Clifford Wolf
36954471a6
Added help messages for opt_* passes
2013-03-01 09:01:49 +01:00
Clifford Wolf
7764d0ba1d
initial import
2013-01-05 11:13:26 +01:00