Clifford Wolf
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84ffe04075
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Fixed various VS warnings
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2014-10-18 15:20:38 +02:00 |
Clifford Wolf
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973d376733
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Added genfiles.zip to MXE "make dist"
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2014-10-17 12:11:15 +02:00 |
Clifford Wolf
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c21c9dab1e
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Removed CHECK() macro from libparse.cc (was using non-std c features)
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2014-10-13 17:22:06 +02:00 |
Clifford Wolf
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54bf3a95dd
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More Win32 build fixes
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2014-10-10 18:34:19 +02:00 |
Clifford Wolf
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bbd808072b
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Added format __attribute__ to stringf()
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2014-10-10 17:22:08 +02:00 |
Clifford Wolf
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4569a747f8
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Renamed SIZE() to GetSize() because of name collision on Win32
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2014-10-10 17:07:24 +02:00 |
Clifford Wolf
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ccf7b2e342
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Added mxe-based cross build for win32
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2014-10-09 10:50:44 +02:00 |
Clifford Wolf
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696d7ed40e
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Fixes in "hilomap" help message
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2014-10-08 21:38:37 +02:00 |
Clifford Wolf
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f9a307a50b
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namespace Yosys
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2014-09-27 16:17:53 +02:00 |
Clifford Wolf
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b86410b2ab
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More aggressive $macc merging in alumacc
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2014-09-15 12:42:11 +02:00 |
Clifford Wolf
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b470c480e9
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Added the obvious optimizations to alumacc $macc generator
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2014-09-15 12:22:03 +02:00 |
Clifford Wolf
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fcbda07411
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Improved maccmap tree bit packing
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2014-09-15 12:00:19 +02:00 |
Clifford Wolf
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7e156a5419
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Fixed techmap_wrap for techmap_celltype
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2014-09-14 15:34:36 +02:00 |
Clifford Wolf
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014bb34e0e
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Various fixes/cleanups in alumacc and maccmap
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2014-09-14 14:49:53 +02:00 |
Clifford Wolf
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124e759280
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Added techmap_wrap attribute
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2014-09-14 14:49:26 +02:00 |
Clifford Wolf
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b34ca15185
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alumacc fix for $pos cells
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2014-09-14 14:00:14 +02:00 |
Clifford Wolf
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0df1d9ad72
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Extract $alu cells in alumacc
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2014-09-14 13:23:44 +02:00 |
Clifford Wolf
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7b16c63101
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Merge $macc cells in alumacc pass
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2014-09-14 11:21:37 +02:00 |
Clifford Wolf
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0b72f0acb1
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Basic $macc extract in alumacc
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2014-09-14 10:45:28 +02:00 |
Clifford Wolf
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ff157fb74f
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alumacc skeleton
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2014-09-14 10:02:00 +02:00 |
Clifford Wolf
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d46bac3305
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Added "$fa" cell type
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2014-09-08 12:15:39 +02:00 |
Clifford Wolf
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1a88e47396
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Trim msb/lsb zero bits from full adder in maccmap
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2014-09-08 11:21:58 +02:00 |
Clifford Wolf
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c50b841b29
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Added 'techmap_maccmap' techmap attribute
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2014-09-07 18:23:37 +02:00 |
Clifford Wolf
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015dcdc84c
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Added "maccmap" command
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2014-09-07 18:23:04 +02:00 |
Clifford Wolf
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8927aa6148
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Removed $bu0 cell type
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2014-09-04 02:07:52 +02:00 |
Clifford Wolf
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826fdb34d8
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Added "techmap -autoproc"
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2014-09-01 15:36:29 +02:00 |
Clifford Wolf
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d148b0af0d
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Fixed inserting of Q-inverters in dfflibmap
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2014-08-27 19:44:12 +02:00 |
Clifford Wolf
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c642dd0b3e
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Only call proc_share_dirname() in techmap when necessary
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2014-08-23 15:32:00 +02:00 |
Clifford Wolf
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19cff41eb4
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Changed frontend-api from FILE to std::istream
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2014-08-23 15:03:55 +02:00 |
Clifford Wolf
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5dce303a2a
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Changed backend-api from FILE to std::ostream
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2014-08-23 13:54:21 +02:00 |
Clifford Wolf
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410d043dd8
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Renamed toposort.h to utils.h
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2014-08-17 00:55:35 +02:00 |
Clifford Wolf
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674f421b47
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Bugfix in iopadmap
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2014-08-15 14:29:42 +02:00 |
Clifford Wolf
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f092b50148
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Renamed $_INV_ cell type to $_NOT_
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2014-08-15 14:11:40 +02:00 |
Clifford Wolf
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ca87116449
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More idstring sort_by_* helpers and fixed tpl ordering in techmap
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2014-08-15 02:40:46 +02:00 |
Clifford Wolf
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d320e75087
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document "techmap -map %<design-name>"
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2014-08-15 02:01:30 +02:00 |
Clifford Wolf
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1bf7a18fec
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Added module->ports
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2014-08-14 16:22:52 +02:00 |
Clifford Wolf
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014a41fcf3
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Implemented recursive techmap
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2014-08-03 12:40:43 +02:00 |
Clifford Wolf
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08ec33a5e5
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Implemented simplemap support for "techmap -extern"
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2014-08-02 21:55:13 +02:00 |
Clifford Wolf
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b6acbc82e6
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Bugfix in "techmap -extern"
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2014-08-02 20:54:30 +02:00 |
Clifford Wolf
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04727c7e0f
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No implicit conversion from IdString to anything else
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2014-08-02 18:58:40 +02:00 |
Clifford Wolf
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768eb846c4
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More bugfixes related to new RTLIL::IdString
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2014-08-02 18:14:21 +02:00 |
Clifford Wolf
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b9bd22b8c8
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More cleanups related to RTLIL::IdString usage
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2014-08-02 13:19:57 +02:00 |
Clifford Wolf
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bd74ed7da4
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Replaced sha1 implementation
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2014-08-01 19:01:10 +02:00 |
Clifford Wolf
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cdae8abe16
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Renamed port access function on RTLIL::Cell, added param access functions
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2014-07-31 16:38:54 +02:00 |
Clifford Wolf
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e6d33513a5
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Added module->design and cell->module, wire->module pointers
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2014-07-31 14:11:39 +02:00 |
Clifford Wolf
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1cb25c05b3
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Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace
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2014-07-31 13:19:47 +02:00 |
Clifford Wolf
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1202f7aa4b
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Renamed "stdcells.v" to "techmap.v"
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2014-07-31 02:32:00 +02:00 |
Clifford Wolf
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6ca0c569d9
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Added "techmap -assert"
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2014-07-31 02:21:41 +02:00 |
Clifford Wolf
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2541489105
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Added techmap CONSTMAP feature
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2014-07-30 22:04:30 +02:00 |
Clifford Wolf
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03c96f9ce7
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Added "techmap -map %{design-name}"
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2014-07-29 16:35:13 +02:00 |