Eddie Hung
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6d76ae4c65
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Rename pattern to fixed
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2019-08-21 15:46:58 -07:00 |
Eddie Hung
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b0a3b430bf
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attribute -> attr
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2019-08-21 15:44:07 -07:00 |
Eddie Hung
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61b4d7ae13
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Use Cell::has_keep_attribute()
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2019-08-21 15:41:46 -07:00 |
Eddie Hung
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6fa9e03e4c
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xilinx_srl to support FDRE and FDRE_1
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2019-08-21 15:35:29 -07:00 |
Eddie Hung
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3c8e8521a6
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Fix polarity of EN_POL
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2019-08-21 14:42:11 -07:00 |
Eddie Hung
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a980f0d4be
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Add CLKPOL == 0
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2019-08-21 14:35:40 -07:00 |
Eddie Hung
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1c7d721558
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Reject if not minlen from inside pattern matcher
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2019-08-21 14:26:24 -07:00 |
Eddie Hung
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cab2bd083e
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Get wire via SigBit
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2019-08-21 13:47:47 -07:00 |
Eddie Hung
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52fea5b658
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Respect \keep on cells or wires
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2019-08-21 13:42:03 -07:00 |
Eddie Hung
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5ce0c31d0e
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Add init support
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2019-08-21 13:05:10 -07:00 |
Eddie Hung
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df53fe12e7
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Fix spacing
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2019-08-21 12:54:11 -07:00 |
Eddie Hung
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0250712486
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Initial progress on xilinx_srl
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2019-08-21 12:50:49 -07:00 |
Clifford Wolf
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7d8db1c053
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Merge pull request #1314 from YosysHQ/eddie/fix_techmap
techmap -max_iter to apply to each module individually
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2019-08-21 09:12:56 +02:00 |
Eddie Hung
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9b9d759451
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Fix copy-paste typo
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2019-08-20 20:18:51 -07:00 |
Eddie Hung
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fe61dcce8b
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Grammar
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2019-08-20 20:05:51 -07:00 |
Eddie Hung
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193eae0c84
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techmap -max_iter to apply to each module individually
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2019-08-20 19:50:20 -07:00 |
Eddie Hung
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14c03861b6
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Merge pull request #1304 from YosysHQ/eddie/abc9_refactor
Refactor abc9 to use port attributes, not module attributes
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2019-08-20 11:59:31 -07:00 |
Clifford Wolf
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d0117d7d12
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Merge branch 'master' into clifford/pmgen
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2019-08-20 11:39:23 +02:00 |
whitequark
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749ff864aa
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Merge pull request #1309 from whitequark/proc_clean-fix-1268
proc_clean: fix order of switch insertion
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2019-08-20 00:45:41 +00:00 |
Eddie Hung
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7e010834eb
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Fix typo
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2019-08-19 10:41:18 -07:00 |
Eddie Hung
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f42ba811b6
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ID({A,B,Y}) -> ID::{A,B,Y} for opt_share.cc
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2019-08-19 10:11:47 -07:00 |
Eddie Hung
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d81a090d89
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Unify abc_carry_{in,out} into abc_carry and use port dir, as @mithro
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2019-08-19 09:56:17 -07:00 |
whitequark
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4a942ba7b9
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proc_clean: fix order of switch insertion.
Fixes #1268.
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2019-08-19 16:44:23 +00:00 |
Clifford Wolf
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1e3dd0a2da
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Merge branch 'master' of github.com:YosysHQ/yosys into clifford/pmgen
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2019-08-19 13:04:06 +02:00 |
Miodrag Milanovic
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dbe3cb9708
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Ignore all generated headers for pmgen pass
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2019-08-18 10:49:17 +02:00 |
whitequark
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101235400c
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Merge branch 'master' into eddie/pr1266_again
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2019-08-18 08:04:10 +00:00 |
Clifford Wolf
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2a78a1fd00
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Merge pull request #1283 from YosysHQ/clifford/fix1255
Fix various NDEBUG compiler warnings
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2019-08-17 15:07:16 +02:00 |
Clifford Wolf
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ae5d8dc939
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Merge pull request #1303 from YosysHQ/bogdanvuk/opt_share
Implement opt_share from @bogdanvuk
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2019-08-17 15:03:46 +02:00 |
Clifford Wolf
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8915f496d9
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Merge pull request #1300 from YosysHQ/eddie/cleanup2
Use ID::{A,B,Y,keep,blackbox,whitebox} instead of ID()
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2019-08-17 15:01:31 +02:00 |
Clifford Wolf
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f3405fb048
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Refactor pmgen rollback mechanism
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-08-17 13:54:18 +02:00 |
Clifford Wolf
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318ae0351c
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Improvements in "test_pmgen -generate"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-08-17 13:53:55 +02:00 |
Clifford Wolf
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f95853c822
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Add pmgen "fallthrough" statement
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-08-17 11:29:37 +02:00 |
Eddie Hung
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5abe133323
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Use ID()
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2019-08-16 16:38:49 -07:00 |
Eddie Hung
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4fe307f1bc
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Compute abc_scc_break and move CI/CO outside of each abc9
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2019-08-16 15:41:17 -07:00 |
Eddie Hung
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3d3779b037
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Use ID() macro
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2019-08-16 14:01:55 -07:00 |
Eddie Hung
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fab067cece
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Add 'opt_share' to 'opt -full'
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2019-08-16 13:47:37 -07:00 |
Eddie Hung
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51d28645da
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Merge https://github.com/bogdanvuk/yosys into bogdanvuk/opt_share
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2019-08-16 13:40:29 -07:00 |
Eddie Hung
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cd5a372cd1
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Add help() call
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2019-08-16 13:00:12 -07:00 |
Eddie Hung
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29e14e674e
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Remove `using namespace RTLIL;`
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2019-08-16 19:36:45 +00:00 |
Clifford Wolf
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64bd414e54
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Minor bugfix in "test_pmgen -generate"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-08-16 14:35:13 +02:00 |
Clifford Wolf
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958be89c47
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Merge pull request #1302 from mmicko/dfflibmap_regression
DFFLIBMAP pass regression fix
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2019-08-16 14:26:58 +02:00 |
Clifford Wolf
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20910fd7c8
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Add pmgen finish statement, return number of matches
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-08-16 14:16:35 +02:00 |
Clifford Wolf
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f45dad8220
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Redesign pmgen backtracking for recursive matching
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-08-16 13:47:50 +02:00 |
Clifford Wolf
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c710df181c
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Add pmgen "generate" feature
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-08-16 13:26:36 +02:00 |
Miodrag Milanovic
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72eacdb9f8
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Regression in abc9
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2019-08-16 13:21:11 +02:00 |
Miodrag Milanovic
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bb79e050a5
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Just needed IDs to be IdString
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2019-08-16 11:50:34 +02:00 |
Clifford Wolf
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4a57b7e1ab
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Refactor demo_reduce into test_pmgen
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-08-16 11:47:51 +02:00 |
Clifford Wolf
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bb37a20e8d
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Add missing NMUX to "abc -g" handling
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-08-16 10:36:11 +02:00 |
Eddie Hung
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eae5a6b12c
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Use ID::keep more liberally too
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2019-08-15 14:51:12 -07:00 |
Eddie Hung
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52355f5185
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Use more ID::{A,B,Y,blackbox,whitebox}
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2019-08-15 14:50:10 -07:00 |