This website requires JavaScript.
Explore
Help
Sign In
riscv
/
yosys
mirror of
https://github.com/YosysHQ/yosys.git
Watch
1
Star
0
Fork
You've already forked yosys
0
Code
Issues
Projects
Releases
Wiki
Activity
14,199
Commits
92
Branches
49
Tags
39
MiB
65723200e5
Commit Graph
1 Commits
Author
SHA1
Message
Date
Krystine Sherwin
fae35fe98b
Docs: example_synth fifo update
...
More detail on `memory_libmap`, the `$__ICE40_RAM4K_` intermediate step, and the bizarre opt output.
2024-01-30 13:34:29 +13:00