riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
10,939 Commits 81 Branches 48 Tags 63 MiB
Commit Graph

3527 Commits

Author SHA1 Message Date
Alberto Gonzalez 95e8016811
qbfsat: Clean up external executable command lines and update temporary directory name. 2020-07-01 19:55:16 +00:00
Alberto Gonzalez 8cd60be654
qbfsat: Clean up and refactor data structures into `qbfsat.h`. 2020-07-01 19:55:16 +00:00
clairexen b1707407a0
Merge pull request #2138 from boqwxp/qbfsat-oflag 
qbfsat: Add `-O[012]` options to control pre-solving simplification with ABC
 2020-07-01 16:35:27 +02:00
clairexen 2b0f6e24e2
Merge pull request #2206 from boqwxp/qbfsat-fix-name-specialization 
qbfsat: Fix name-based hole specialization
 2020-07-01 16:34:32 +02:00
Marcelina Kościelnicka e3564b4502 Add dfflegalize pass. 2020-07-01 01:57:15 +02:00
Marcelina Kościelnicka 7c91f13f51 fmcombine: use the master ff cell type list 2020-06-30 21:07:17 +02:00
Marcelina Kościelnicka 77b15dd8e9 opt_merge: use the master FF type list 2020-06-30 20:57:35 +02:00
clairexen 3fb5b4fd8a
Merge pull request #2199 from YosysHQ/mmicko/sim_memory 
sim - error when memrd and memwr detected
 2020-06-30 17:12:51 +02:00
clairexen 275cee71f6
Merge pull request #2201 from YosysHQ/fix_test_cell_ilang 
Use ID macro to fix assertion
 2020-06-30 17:11:13 +02:00
Alberto Gonzalez 83c595aaac
qbfsat: Add `-O[012]` options to control pre-solving simplification with ABC. 
Thanks to @mwk for the gate mapping part of the ABC scripts.

Co-Authored-By: Marcelina Kościelnicka <mwk@0x04.net>
 2020-06-30 06:44:17 +00:00
Alberto Gonzalez f544a2cc84
qbfsat: Fix name-based hole specialization. 
Look for unique connections in the containing module with the $anyconst port Y SigBit on the RHS and use those. If no such connection is found, fall back to using the name of the $anyconst port Y SigBit.
 2020-06-30 01:53:21 +00:00
whitequark a97c13f0ca techmap: don't drop attributes on replaced cells. 
This was introduced in 76c4ee4ea5.

Fixes #2204.
 2020-06-29 23:14:13 +00:00
Miodrag Milanović 4160acc0b1
Merge pull request #2200 from YosysHQ/mmicko/fix_expose 
expose pass fix
 2020-06-29 15:16:29 +02:00
Miodrag Milanovic 405b4e97a1 Give error that options are exclusive 2020-06-29 14:45:49 +02:00
Miodrag Milanovic 0545a042f3 cleanup 2020-06-29 14:42:48 +02:00
Miodrag Milanovic 5aae936044 Use ID macro to fix assertion 2020-06-29 13:18:13 +02:00
Miodrag Milanovic 87717d67d1 expose pass fix 2020-06-29 11:56:43 +02:00
Miodrag Milanovic 48b6d3272c sim - error when memrd and memwr detected 2020-06-29 10:33:39 +02:00
Xiretza e2cfe57edd
test_cell: don't generate directional shifts with \B_SIGNED=1 
This was made an explicit error in e97e33d, "kernel: require \B_SIGNED=0
on $shl, $sshl, $shr, $sshr.".
 2020-06-28 21:30:16 +02:00
clairexen c7d71f436d
Merge pull request #2168 from whitequark/assert-unused-exprs 
Use (and ignore) the expression provided to log_assert in NDEBUG builds
 2020-06-25 18:21:51 +02:00
clairexen 21209d632e
Merge pull request #2135 from boqwxp/qbfsat-timeinfo 
log and qbfsat: Also include child process usage in `PerformanceTimer::query()` and report the time for each call to the QBF-SAT solver
 2020-06-25 18:18:09 +02:00
clairexen fb6441731a
Merge pull request #2093 from boqwxp/qbfsat-bugfixes 
qbfsat: Multiple bugfixes
 2020-06-25 18:14:17 +02:00
Marcelina Kościelnicka 8f12c5b063 simplemap: Fix $dffsre mapping. 2020-06-23 23:16:43 +02:00
Marcelina Kościelnicka 88e7f90663 Update dff2dffe, dff2dffs, zinit to new FF types. 2020-06-23 18:24:53 +02:00
Marcelina Kościelnicka 832acc8648 Add new FF types to simplemap. 2020-06-23 15:40:02 +02:00
Marcelina Kościelnicka 119f79d8b9 Add support for new FF types in some opt passes. 2020-06-23 15:40:02 +02:00
Marcelina Kościelnicka b0bee396a8 Add new builtin FF types 
The new types include:

- FFs with async reset and enable (`$adffe`, `$_DFFE_[NP][NP][01][NP]_`)
- FFs with sync reset (`$sdff`, `$_SDFF_[NP][NP][01]_`)
- FFs with sync reset and enable, reset priority (`$sdffs`, `$_SDFFE_[NP][NP][01][NP]_`)
- FFs with sync reset and enable, enable priority (`$sdffce`, `$_SDFFCE_[NP][NP][01][NP]_`)
- FFs with async reset, set, and enable (`$dffsre`, `$_DFFSRE_[NP][NP][NP][NP]_`)
- latches with reset or set (`$adlatch`, `$_DLATCH_[NP][NP][01]_`)

The new FF types are not actually used anywhere yet (this is left
for future commits).
 2020-06-23 15:40:02 +02:00
Alberto Gonzalez a564cc806f
log, qbfsat: Include child process time in `PerformanceTimer::query()` and report the time for each call to the QBF-SAT solver. 2020-06-21 02:16:52 +00:00
Alberto Gonzalez 62a9e62a1b
qbfsat: Simplify solution recovery parsing and tweak the solution regexes. 2020-06-21 02:16:11 +00:00
Alberto Gonzalez e1fedf054e
qbfsat: Avoid instantiating `AttrObject`s directly. 
Co-Authored-By: Claire Wolf <claire@symbioticeda.com>
 2020-06-21 02:16:11 +00:00
Alberto Gonzalez 08cede4669
qbfsat: Simplify solution format and replace `SigBit::str()` with `log_signal()`. 
Co-Authored-By: Claire Wolf <claire@symbioticeda.com>
 2020-06-21 02:16:11 +00:00
Alberto Gonzalez 4ab41c6435
qbfsat: Fixes three bugs. 
1. Infinite loop in the optimization procedure when the first solution found while maximizing is at zero.
2. A signed-ness issue when maximizing.
3. Erroneously entering bisection mode with no wire to optimize.
 2020-06-21 02:16:11 +00:00
Alberto Gonzalez a3d1f8637a
qbfsat: Use bit precise mapping for hole value wires and a more robust hole spec for writing to and specializing from a solution file. 2020-06-21 02:16:11 +00:00
whitequark c8c3c7af87 Use [[maybe_unused]] instead of YS_ATTRIBUTE(unused). 
[[maybe_unused]] is available since C++17, so this commit adds
a polyfill YS_MAYBE_UNUSED. Once we require C++17 we can drop it.
 2020-06-19 15:48:58 +00:00
whitequark 118e4caa37 Remove YS_ATTRIBUTE(unused) where present just for log_assert()/log_debug(). 2020-06-19 15:48:58 +00:00
whitequark ede4b10da8
Merge pull request #2173 from whitequark/use-cxx11-final-override 
Use C++11 final/override/[[noreturn]]
 2020-06-19 06:15:33 +00:00
whitequark 7191dd16f9 Use C++11 final/override keywords. 2020-06-18 23:34:52 +00:00
Alberto Gonzalez 76dfa81790
cutpoint: Improve efficiency by iterating over module ports instead of module wires. 2020-06-18 17:42:36 +00:00
N. Engelhardt dfde1cf1c5
Merge pull request #2153 from boqwxp/splitnets-cleanup 
splitnets: Cleanup and efficiency improvements
 2020-06-18 19:16:55 +02:00
whitequark 5439faebf9
Merge pull request #2142 from whitequark/splitnets-hdlname 
splitnets: propagate (*hdlname*) and disambiguate via start_offset
 2020-06-18 16:57:24 +00:00
Anonymous Maarten 60fb9cabcf msvc does not support designated initializers in structs 2020-06-17 16:20:52 +02:00
Alberto Gonzalez f5d7cd60f5
splitnets: Clean up pseudo-private member usage 2020-06-13 05:47:55 +00:00
Alberto Gonzalez b70de98bd1
splitnets: Slightly improve efficiency by avoiding some unnecessary lookups 2020-06-13 05:26:30 +00:00
whitequark 2139a5c21a splitnets: propagate (*hdlname*) and disambiguate via start_offset. 
This allows reliably coalescing the split wires later.
 2020-06-10 19:59:08 +00:00
Claire Wolf 0bd70e8222 Drive-by modernization in sat.cc 
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
 2020-06-09 22:48:26 +02:00
Claire Wolf 3c7122c378 Do not optimize away FFs in "prep" and Verific fron-end 
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
 2020-06-09 15:54:14 +02:00
whitequark 98e1080345 flatten: accept processes. 2020-06-09 09:56:23 +00:00
whitequark fbb346ea91 flatten: preserve original object names via hdlname attribute. 2020-06-08 20:19:41 +00:00
whitequark 8d821dbbdb flatten: only prepend $flatten once per wire. 2020-06-08 20:19:41 +00:00
whitequark a1814b732f flatten: make hygienic. 
Before this commit, `flatten` matched the template objects with
the newly created objects solely by their name. Because of this,
it could be confused by code such as:

    module bar();
      $dff a();
    endmodule

    module foo();
      bar b();
      $dff \b.a ();
    endmodule

After this commit, `flatten` avoids every possible case of name
collision.

Fixes #2106.
 2020-06-08 19:30:21 +00:00
clairexen 369dcb4e82
Merge pull request #2085 from rswarbrick/select 
Silence warning in select.cc and pass some more args by ref
 2020-06-08 15:55:52 +02:00
clairexen 0f209378a8
Merge pull request #2089 from rswarbrick/modports 
Simplify a modport check in hierarchy.cc
 2020-06-08 15:48:11 +02:00
clairexen fbd0d8d5f0
Merge pull request #2105 from whitequark/split-flatten-off-techmap 
Split `flatten` from `techmap` and simplify it
 2020-06-08 15:27:15 +02:00
Marcelina Kościelnicka 28b9f49c94 fsm_extract: avoid calling log_signal to determine wire name 
log_signal can result in a string with spaces (when bit selection is
involved), which breaks the rule of IdString not containing whitespace.
Instead, remove the sigspec from the name entirely — given that the
resulting wire will have no users, it will be removed later anyway,
so its name doesn't really matter.

Fixes #2118
 2020-06-08 03:49:58 +02:00
Eddie Hung 69850204c4
Merge pull request #2077 from YosysHQ/eddie/abc9_dff_improve 
abc9: -dff improvements
 2020-06-04 08:15:25 -07:00
whitequark 5a5a9b4ffe flatten: clean up log messages. 2020-06-04 12:22:59 +00:00
whitequark d731fe054b flatten: topologically sort modules. 2020-06-04 12:22:59 +00:00
Eddie Hung 45cd323055
Merge pull request #2082 from YosysHQ/eddie/abc9_scc_fixes 
abc9: fixes around handling combinatorial loops
 2020-06-03 17:35:46 -07:00
whitequark 6268bdfe6f flatten: simplify. 
`flatten` cannot derive modules in most cases because that would just
yield processes, and it does not support `-autoproc`; in practice
`flatten` has to be preceded by a call to `hierarchy`, which makes
deriving unnecessary.
 2020-06-04 00:02:12 +00:00
whitequark d3e2100306 flatten: simplify. NFC. 
Remove redundant sigmaps.
 2020-06-04 00:02:12 +00:00
whitequark 66255dab4e flatten: simplify. 
Flattening does not benefit from topologically sorting cells within
a module when processing them.
 2020-06-04 00:02:12 +00:00
whitequark 5d2b6d1394 flatten: simplify. NFC. 
Flatten is non-recursive and doesn't need to keep track of handled
cells.
 2020-06-04 00:02:12 +00:00
whitequark 3c3fa774e5 flatten: simplify. NFC. 
Flattening always does "non-recursive" mapping.
 2020-06-04 00:02:12 +00:00
whitequark e561a3a76f flatten: simplify. NFC. 
The `celltypeMap` always maps `x` to `{x}`.
 2020-06-04 00:02:12 +00:00
whitequark 6783876807 flatten: simplify. NFC. 
The `design` and `map` designs are always the same when flattening.
 2020-06-04 00:02:12 +00:00
whitequark 9338ff66b9 RTLIL: factor out RTLIL::Module::addMemory. NFC. 2020-06-04 00:02:12 +00:00
whitequark ebbbe2156e flatten: rename techmap-related stuff. NFC. 2020-06-04 00:02:12 +00:00
whitequark 76c4ee4ea5 techmap, flatten: remove dead options. 
After splitting the passes, some options can never be activated,
and most conditions involving them become dead. Remove them, and also
all of the newly dead code.
 2020-06-04 00:02:12 +00:00
whitequark 6ac54a74fe flatten: split from techmap. 
Although the two passes started out very similar, they diverged over
time and now have little in common. Moreover, `techmap` is extremely
complex while `flatten` does not have to be, and this complexity
interferes with improving `flatten`.
 2020-06-03 15:34:03 +00:00
whitequark fb5b070e7e techmap: remove dead variable. NFC. 2020-06-03 01:44:06 +00:00
whitequark 0a74368bfc techmap: use C++11 default member initializers. NFC. 2020-06-02 23:43:20 +00:00
whitequark f3e86bb32a techmap: simplify. 
`rewrite_filename` is already called in `Frontend::extra_args`.
 2020-06-02 23:43:20 +00:00
whitequark 68d747f767 techmap: use +/techmap.v instead of an ad-hoc code generator. 2020-06-02 23:43:20 +00:00
clairexen ff785cdb46
Merge pull request #1862 from boqwxp/cleanup_techmap 
Clean up `passes/techmap/techmap.cc`
 2020-05-31 20:40:48 +02:00
Eddie Hung 08d9703ecb abc9_ops: fix comment 2020-05-30 09:01:03 -07:00
Eddie Hung fe273faad1
Merge pull request #2081 from YosysHQ/eddie/blackbox_ast 
blackbox: use Module::makeblackbox() method
 2020-05-30 08:59:20 -07:00
Eddie Hung ea4374a223 abc9_ops: update messaging (credit to @Xiretza for spotting) 2020-05-30 08:57:48 -07:00
clairexen ea46ed81f9
Merge pull request #2018 from boqwxp/qbfsat-timeout 
smtbmc and qbfsat: Add timeout option to set solver timeouts for Z3, Yices, and CVC4.
 2020-05-30 15:04:51 +02:00
Eddie Hung b17e8495b8 abc9_ops: optimise to not derive unless attribute exists 2020-05-29 17:33:10 -07:00
Eddie Hung d3b53bc495 abc9_ops: -reintegrate use SigMap to remove (* init *) from $_DFF_[NP]_ 2020-05-29 17:17:40 -07:00
clairexen 94c1035389
Merge pull request #1885 from Xiretza/mod-rem-cells 
Fix modulo/remainder semantics
 2020-05-29 16:37:23 +02:00
clairexen 5874a14d65
Merge pull request #2017 from boqwxp/qbfsat-cvc4 
qbfsat: Add support for CVC4.
 2020-05-29 16:23:10 +02:00
clairexen 1c8d5a08a0
Merge pull request #2016 from boqwxp/qbfsat-yices 
qbfsat: Add `-solver` option and allow choice of Z3 or Yices, making Yices the default.
 2020-05-29 16:21:45 +02:00
Xiretza edd8ff2c07
Add flooring division operator 
The $div and $mod cells use truncating division semantics (rounding
towards 0), as defined by e.g. Verilog. Another rounding mode, flooring
(rounding towards negative infinity), can be used in e.g. VHDL. The
new $divfloor cell provides this flooring division.

This commit also fixes the handling of $div in opt_expr, which was
previously optimized as if it was $divfloor.
 2020-05-28 22:59:04 +02:00
Xiretza 17163cf43a
Add flooring modulo operator 
The $div and $mod cells use truncating division semantics (rounding
towards 0), as defined by e.g. Verilog. Another rounding mode, flooring
(rounding towards negative infinity), can be used in e.g. VHDL. The
new $modfloor cell provides this flooring modulo (also known as "remainder"
in several languages, but this name is ambiguous).

This commit also fixes the handling of $mod in opt_expr, which was
previously optimized as if it was $modfloor.
 2020-05-28 22:59:03 +02:00
whitequark 0d99522b3c
Merge pull request #2095 from rswarbrick/hier-typo 
Fix small typos in documentation for hierarchy command
 2020-05-28 10:49:14 +00:00
Rupert Swarbrick 1158bbf7db Fix small typos in documentation for hierarchy command 2020-05-28 11:39:44 +01:00
Alberto Gonzalez 5896ffd56f
printattrs: Simplify `get_indent_str()`. 
Co-Authored-By: Xiretza <xiretza@xiretza.xyz>
 2020-05-28 05:34:28 +00:00
Alberto Gonzalez f671c99cb8
printattrs: Refactor indentation string building for clarity. 
Co-Authored-By: whitequark <whitequark@whitequark.org>
 2020-05-27 23:15:07 +00:00
Rupert Swarbrick d681c9df85 Pass some more args by reference in select.cc 
Before this patch, the code passed around std::string objects by
value. It's probably not a hot-spot, but it can't hurt to avoid the
copying.

Removing the copy and clean-up code means the resulting code is ~6.1kb
smaller when compiled with GCC 9.3 and standard settings.
 2020-05-27 09:42:23 +01:00
Rupert Swarbrick 061d1f0c07 Minor optimisations in select.cc's match_ids function 
- Pass a string argument by reference

  - Avoid multiple calls to IdString::str and IdString::c_str

  - Avoid combining checks for size > 0 and first char (C strings are
    null terminated, so foo[0] != '\0' implies that foo has positive
    length)
 2020-05-27 09:36:33 +01:00
Rupert Swarbrick 0d9beb5b2e Silence warning in select.cc 
With GCC 9.3, at least, compiling select.cc spits out a warning about
an implausible bound being passed to strncmp. This comes from inlining
IdString::compare(): it turns out that passing std::string::npos as a
bound to strncmp triggers it.

This patch replaces the compare call with a memcmp with the same
effect. The repeated calls to IdString::c_str are slightly
inefficient, but I'll address that in a follow-up commit.
 2020-05-27 09:34:15 +01:00
Alberto Gonzalez e50e4ee285
printattrs: Use `flags` to pretty-print the `RTLIL::Const` appropriately. 
Co-Authored-By: whitequark <whitequark@whitequark.org>
 2020-05-27 08:00:00 +00:00
Alberto Gonzalez b8365547e9
misc: Add `printattrs` command. 2020-05-27 08:00:00 +00:00
Rupert Swarbrick 7746bba69a Simplify a modport check in hierarchy.cc 
This code originally comes from commit 458a940. When an interface is
used via a modport, code in genrtlil.cc sets '\\interface_type' and
'\\interface_modport' properties on the wire.

In hierarchy.cc, we pick up the modport name and add it to a dict
called modports_used_in_submodule (that maps connection source to
modport name).

Before this patch, the modport name is retrieved as a strpool and then
iterated over in an arbitrary order, discarding all entries but the
last. In practice, the pool will always have 0 or 1 entries because
the string used to construct it is a valid identifier, so doesn't
contain any pipe symbols.

This patch changes the code to retrieve the modport name as just a
string. This will have the same effect in practice, but may be a bit
less confusing!

The code also gets moved down closer to where the result is used,
which might be a bit more efficient since we won't always get as far
as the check.

The patch also removes some commented-out code, which I think was
intended to add some typechecking at some point, but was never
implemented. Since this dates back to October 2018, I think it makes
more sense to just take it out.
 2020-05-26 16:50:42 +01:00
Eddie Hung 00c5ceb1f2 abc9_ops: -prep_xaiger exclude (* abc9_keep *) wires from toposort 2020-05-25 16:40:53 -07:00
Alberto Gonzalez 9847a4eea8
smtbmc and qbfsat: Add timeout option to set solver timeouts for Z3, Yices, and CVC4. 2020-05-25 20:39:30 +00:00
Alberto Gonzalez f9eef5e3f7
qbfsat: Add support for CVC4. 2020-05-25 20:39:03 +00:00
Alberto Gonzalez 903456c267
qbfsat: Add `-solver` option and allow choice of Z3 or Yices, making Yices the default. 
Ensures that "BV" is the logic whenever solving an exists-forall problem with Yices, moves the "(set-logic ...)" directive above any non-info line, sets the `ef-max-iters` parameter to a very high number when using Yices in exists-forall mode so as not to prematurely abandon difficult problems, and does not provide the incompatible "--incremental" Yices argument when in exists-forall mode.
 2020-05-25 20:38:29 +00:00
Eddie Hung 721283ac2a blackbox: re-use existing Module::makeblackbox() method 2020-05-25 10:53:49 -07:00
Eddie Hung 7bad23f19c abc9_ops: -reintegrate to preserve flop names 2020-05-25 08:43:33 -07:00
clairexen ae11156c90
Merge pull request #2015 from boqwxp/qbfsat-bisection 
qbfsat: Add an iterative bisection optimization method and make it the default.
 2020-05-25 15:50:18 +02:00
Alberto Gonzalez ac41f8a9c7
qbfsat: Remove cruft inadvertently left untouched in commit 86fc49a9d6. 2020-05-23 00:53:09 +00:00
Alberto Gonzalez aea0fd5ed4
qbfsat: Add bisection mode and make it the default. 
Also adds `-nooptimize` and reorganizes `qbfsat.cc` a bit.
 2020-05-23 00:53:09 +00:00
Eddie Hung 4f0f321169 abc9_ops: update comment 2020-05-21 21:39:13 -07:00
Miodrag Milanović 637650597b
Merge pull request #2059 from boqwxp/logger-vector-to-dict 
log: Use `dict` instead of `std::vector<std::pair>` for `log_expect_{error, warning, log}` to better express the intent that each element is unique.
 2020-05-21 15:36:30 +02:00
Eddie Hung 2d573a0ff6
Merge pull request #1926 from YosysHQ/eddie/abc9_auto_dff 
abc9: support seq synthesis when module has (* abc9_flop *) and bypass non-combinatorial (* abc9_box *)
 2020-05-18 08:06:50 -07:00
Alberto Gonzalez 8297afe925
log: Use `dict` instead of `std::vector<std::pair>` for `log_expect_{error, warning, log}` to better express the intent that each element is unique. 2020-05-15 00:55:32 +00:00
Eddie Hung 67fc0c3698 abc9: use (* abc9_keep *) instead of (* abc9_scc *); apply to $_DFF_?_ 
instead of moving them to $__ prefix
 2020-05-14 16:44:35 -07:00
Eddie Hung 07eecff9cc
Merge pull request #2055 from YosysHQ/eddie/logger_multiple 
logger: fix for multiple calls with same pattern
 2020-05-14 15:30:08 -07:00
Alberto Gonzalez e173291649
techmap: Replace naughty `const_cast<>()`s. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-05-14 20:06:55 +00:00
Alberto Gonzalez 97fd304cbe
techmap: Replace pseudo-private member usage with the range accessor function and some naughty `const_cast<>()`s. 2020-05-14 20:06:55 +00:00
Eddie Hung 36bb201dd9
techmap: sort celltypeMap as it determines techmap order 2020-05-14 20:06:55 +00:00
Alberto Gonzalez ce62d0751a
Replace `std::set`s using custom comparators with `pool`. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-05-14 20:06:55 +00:00
Eddie Hung dabeb1e8a1
techmap: prefix special wires with backslash for use as IdString 2020-05-14 20:06:55 +00:00
Alberto Gonzalez bd54d67ad4
Further clean up `passes/techmap/techmap.cc`. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-05-14 20:06:54 +00:00
Alberto Gonzalez 982562ff13
Use `emplace()` for more efficient insertion into various `dict`s. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez c658d9d59d
Build constant bits directly rather than constructing an object and copying its bits. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez f235f212ea
Replace `std::set` with `pool` for `cell_to_inbit` and `outbit_to_cell`. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez 6294621825
Use `emplace()` rather than `insert()`. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez dfcb936cd5
Clean up pseudo-private member usage and ensure range iteration uses references where possible to avoid unnecessary copies. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez a4755c50c3
Clean up extraneous buffer. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez 7857782575
Replace `std::map` with `dict` for `unique_bit_id`. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez 6d64d768b0
Replace `std::map` with `dict` for `port_new2old_map`, `port_connmap`, and `cellbits_to_tplbits`. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez 5cb4ae4666
Replace `std::map` with `dict` for `connbits_map`, `cell_to_inbit`, and `outbit_to_cell`. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez c43017fc08
Replace `std::map` with `dict` for `TechmapWires` type. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez 644e55b3d3
Replace `std::map` with `dict` for `celltypeMap`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 67f4046c05
Replace `std::set` with `pool` for `handled_cells` and `techmap_wire_names`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 64c16f8c13
Replace `std::map` with `dict` for `positional_ports`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 2fb4931e5b
Add specialized `hash()` for type `dict` and use a `dict` instead of a `std::map` for `techmap_cache` and `techmap_do_cache`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 437f3fb342
Replace `std::map` with `dict` for `simplemap_mappers`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 99b586b283
Use `nullptr` instead of `NULL` in `passes/techmap/techmap.cc`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 5f7f213c7f
Replace `std::string` and `RTLIL::IdString` with `IdString` in `passes/techmap/techmap.cc`. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-05-14 20:06:53 +00:00
Alberto Gonzalez e49fdee404
Do not modify design modules while iterating over `modules()`. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 985a29ff3b
Clean up pseudo-private member usage, superfluous `std::vector` instantiation, and `RTLIL::id2cstr()` usage in `passes/techmap/techmap.cc`. 2020-05-14 20:06:53 +00:00
Eddie Hung 7b3a4a1fff opt_expr: Sx to Sz; spotted by @Xiretza 2020-05-14 12:14:23 -07:00
Eddie Hung 73b7ea713c
Merge pull request #1994 from YosysHQ/eddie/fix_bug1758 
opt_expr: improve single-bit $and/$or/$xor/$xnor cells; gate cells too
 2020-05-14 11:56:22 -07:00
Eddie Hung 425867d175 logger: clean up doc 2020-05-14 10:38:31 -07:00
Eddie Hung 02df0198b6 abc9_ops: -prep_hier to create unmap module that removes Q's (* init *) 2020-05-14 10:33:57 -07:00
Eddie Hung 13f9d65b6f abc9: preserve $_DFF_?_.Q's (* init *); rely on clean to remove it 2020-05-14 10:33:57 -07:00
Eddie Hung fa31e84112 Fix broken test when ignoring abc9_flop with init == 1'b1 2020-05-14 10:33:57 -07:00
Eddie Hung 97a0a04314 abc9_ops/xaiger: further reducing Module::derive() calls by ... 
replacing _all_ (* abc9_box *) instantiations with their derived types
 2020-05-14 10:33:57 -07:00
Eddie Hung e79127fceb Cleanup; reduce Module::derive() calls 2020-05-14 10:33:57 -07:00
Eddie Hung 8d34aee3d5 abc9: update to =_$abc9_flops pattern which includes whiteboxes 2020-05-14 10:33:57 -07:00
Eddie Hung f652a9c11c abc9_ops: update docs 2020-05-14 10:33:57 -07:00
Eddie Hung 57c478c537 abc9: only do +/abc9_map if `DFF 2020-05-14 10:33:57 -07:00
Eddie Hung 2946bb60e9 abc9: rework submod -- since it won't move (* keep *) cells 2020-05-14 10:33:56 -07:00
Eddie Hung b65610fb62 abc9_ops: move assert 2020-05-14 10:33:56 -07:00
Eddie Hung ed7cb0b095 abc9: put 'aigmap' back 2020-05-14 10:33:56 -07:00
Eddie Hung b3e2538a14 abc9_ops: fix bypass boxes using (* abc9_bypass *) 2020-05-14 10:33:56 -07:00
Eddie Hung d5a8aaba8c abc9_ops: tidy up, suppress error if no boxes/holes 2020-05-14 10:33:56 -07:00
Eddie Hung e2044fd9c7 abc9_ops: -prep_delays to not insert delay box if input connection is const 2020-05-14 10:33:56 -07:00
Eddie Hung 8b5fb99245 abc9_ops: cleanup; -prep_dff -> -prep_dff_submod 2020-05-14 10:33:56 -07:00
Eddie Hung 7cd3f4a79b abc9_ops: add -prep_bypass for auto bypass boxes; refactor 
Eliminate need for abc9_{,un}map.v in xilinx
-prep_dff_{hier,unmap} -> -prep_hier
 2020-05-14 10:33:56 -07:00
Eddie Hung bb840cca9c abc9_ops: -reintegrate to handle $_FF_; cleanup 2020-05-14 10:33:56 -07:00
Eddie Hung c50601e35e abc9: restore selected_modules() 2020-05-14 10:33:56 -07:00
Eddie Hung 48052ad813 abc9: add flop boxes to basic $_DFF_P_ and $_DFF_N_ too 2020-05-14 10:33:56 -07:00
Eddie Hung 4cec21b93e abc9_ops: -prep_dff_map to error if async flop found 2020-05-14 10:33:56 -07:00
Eddie Hung c41c180f68 abc9: remove redundant wbflip 2020-05-14 10:33:56 -07:00
Eddie Hung ec4bbb1444 abc9: generate $abc9_holes design instead of <name>$holes 2020-05-14 10:33:56 -07:00
Eddie Hung c52bb11fb6 abc9_ops: more robust 2020-05-14 10:33:56 -07:00
Eddie Hung 8d7b3c06b2 abc9: suppress warnings when no compatible + used flop boxes formed 2020-05-14 10:33:56 -07:00
Eddie Hung fb447951be abc9: cleanup 2020-05-14 10:33:56 -07:00
Eddie Hung 8bad885e78 abc9_ops: -prep_dff_map to check $_DFF_[NP]_.Q drives module output 2020-05-14 10:33:56 -07:00
Eddie Hung 489e83fc1e abc9_ops: do away with '$abc9_cells' selection 2020-05-14 10:33:56 -07:00
Eddie Hung 043ad8e76c abc9_ops: use new 'design -delete' and 'select -unset' 2020-05-14 10:33:56 -07:00
Eddie Hung 509de98468 submod: revert accidental change 2020-05-14 10:33:56 -07:00
Eddie Hung e38b1280f9 abc9_ops: -prep_dff_map to warn if no specify cells 2020-05-14 10:33:56 -07:00
Eddie Hung a1ae5845f8 abc9_ops: -prep_dff_map to cope with plain $_DFF_[NP]_ flops 2020-05-14 10:33:56 -07:00
Eddie Hung 6b3aa91a2a abc9: cleanup 2020-05-14 10:33:56 -07:00
Eddie Hung edacb8f437 abc9_ops: do not use (* abc9_init *) 2020-05-14 10:33:56 -07:00
Eddie Hung 95763c8d18 abc9_ops: add 'dff' label for auto handling of (* abc9_flop *) boxes 2020-05-14 10:33:56 -07:00
Eddie Hung accfc70fc2 abc9: fix behaviour and help for -box option 2020-05-14 10:33:56 -07:00
Eddie Hung 65395168a0 logger: fix for multiple calls with same pattern 2020-05-14 10:32:07 -07:00
Eddie Hung cd92a706ae Fix whitespace 2020-05-14 09:51:17 -07:00
Eddie Hung 5be4b00a0d opt_clean: improve warning message 2020-05-14 00:59:38 -07:00
Eddie Hung fc9fb09a91 opt_clean: rminit without -purge; also remove if consistent with const.. 
warn otherwise
 2020-05-14 00:31:08 -07:00
Eddie Hung 68b31f5e99 opt_clean: really make 'clean' identical to 'opt_clean' by rminit too 2020-05-14 00:31:08 -07:00
Eddie Hung 9694dc42dd opt_expr: consume_x to require/imply !keepdc 2020-05-08 11:12:43 -07:00
Eddie Hung 17f4e06247 opt_expr: restore consume_x; use for coarse grained too 2020-05-08 11:07:44 -07:00
Claire Wolf 0610424940
Merge pull request #2005 from YosysHQ/claire/fix1990 
Add "nowrshmsk" attribute, fix shift-and-mask bit slice write for signed offset
 2020-05-07 18:11:48 +02:00
Claire Wolf 5c82c19b4b
Merge pull request #2014 from YosysHQ/claire/fixoptalu 
Fix the other "opt_expr -fine" bug introduced in 213a89558
 2020-05-03 11:56:29 +02:00
Claire Wolf 2285cf1219 Fix the other "opt_expr -fine" bug introduced in 213a89558 
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
 2020-05-02 21:50:43 +02:00
Claire Wolf 885deb4e88 Fix the other "opt_expr -fine" bug introduced in 213a89558 
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
 2020-05-02 21:34:24 +02:00
Eddie Hung da7da44919 abc9_ops: -reintegrate to be sensitive to start_offset too 2020-05-02 11:19:04 -07:00
Claire Wolf c3e5a070ea Add plusargs for output files in test_autotb output 
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
 2020-05-02 11:21:01 +02:00
Claire Wolf ca3fc3c882
Merge pull request #2010 from YosysHQ/claire/fixopt 
Fix "opt_expr -fine" bug introduced in 213a89558
 2020-05-02 11:20:02 +02:00
Claire Wolf 8ee32adac3 Fix "opt_expr -fine" bug introduced in 213a89558 
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
 2020-05-01 20:12:16 +02:00
whitequark b43c282e4e Add WASI platform support. 
This includes the following significant changes:
  * Patching ezsat and minisat to disable resource limiting code
    on WASM/WASI, since the POSIX functions they use are unavailable.
  * Adding a new definition, YOSYS_DISABLE_SPAWN, present if platform
    does not support spawning subprocesses (i.e. Emscripten or WASI).
    This definition hides the definition of `run_command()`.
  * Adding a new Makefile flag, DISABLE_SPAWN, present in the same
    condition. This flag disables all passes that require spawning
    subprocesses for their function.
 2020-04-30 18:56:25 +00:00
Eddie Hung b5f38f8342 opt_expr: const_xnor replacement to pad Y with 1'b1 2020-04-24 14:13:45 -07:00
Eddie Hung 56dd036b97 bugpoint: improve messaging 2020-04-24 13:41:19 -07:00
Eddie Hung e602184856 bugpoint: (* keep *) to (* bugpoint_keep *); also apply to modules/cells 2020-04-24 13:26:04 -07:00
Eddie Hung 4bfe6ebea9 bugpoint: skip ports with (* keep *) on; add header 2020-04-24 11:17:09 -07:00
Eddie Hung 83570bc0da opt_expr: more fixes for $xor/$xnor 2020-04-24 11:15:29 -07:00
Eddie Hung 90b71eb84b opt_expr: do not group by X, more fixes 2020-04-23 18:15:07 -07:00
Eddie Hung e7058593f4 opt_expr: improve single-bit $and/$or/$xor/$xnor cells; gate cells too 2020-04-23 15:57:48 -07:00
Eddie Hung bf021a0e1f bugpoint: improve help text 2020-04-23 12:16:55 -07:00
Eddie Hung b048afc3a6
Merge pull request #1974 from YosysHQ/eddie/abc9_disable_mfs 
abc9: tolerate &mfs failure by writing output file before calling it (and using that if it fails)
 2020-04-23 06:43:30 -07:00
Claire Wolf dc9a72bc8d
Merge pull request #1989 from boqwxp/qbfsat_anyconst_sourcelocs 
qbfsat: Make hole name recovery from source locations more robust.
 2020-04-23 11:34:19 +02:00
Claire Wolf 1797c574da
Merge pull request #1988 from boqwxp/qbfsat 
qbfsat: Add `-assume-negative-polarity` option.
 2020-04-23 11:33:54 +02:00
Alberto Gonzalez 4ee8452d34
qbfsat: Make hole name recovery more robust. Allow multiple cell types to share the same source location as long as only one `$anyconst` or `$anyseq` has that location. 2020-04-23 05:45:44 +00:00
Alberto Gonzalez 7369e6b26b
qbfsat: Add `-assume-negative-polarity` option. 2020-04-23 04:06:15 +00:00
Eddie Hung 592baebd22 xilinx: xilinx_dsp_cascade to check CREG for DSP48E1 only 2020-04-22 17:43:25 -07:00
Eddie Hung fa9df06c9d
Merge pull request #1949 from YosysHQ/eddie/select_blackbox 
select: do not select inside black-/white- boxes unless '=' prefix used
 2020-04-22 15:35:05 -07:00
Claire Wolf beb9e4b299
Update passes/cmds/select.cc 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-04-22 21:31:32 +02:00
Eddie Hung 7f33a0294b Cleanup use of hard-coded default parameters in light of #1945 2020-04-22 12:02:30 -07:00
Eddie Hung eaa5a3e786 select: do not select black/white boxes by default, '=' prefix to do so 2020-04-22 10:15:56 -07:00
Eddie Hung 28623f19ee
Merge pull request #1950 from YosysHQ/eddie/design_import 
design: -import to not count black/white-boxes as candidates for top
 2020-04-22 09:32:13 -07:00
Claire Wolf c32b4bded5
Merge pull request #1976 from YosysHQ/dave/fix-sim-const 
sim: Fix handling of constant-connected cell inputs at startup
 2020-04-22 16:57:34 +02:00
Marcelina Kościelnicka cd82afb740 bugpoint: Don't remove modules or cells while iterating over them. 
Reported by @ZirconiumX.
 2020-04-22 00:09:01 +02:00
Marcelina Kościelnicka 846c79b312 hierarchy: Convert positional parameters to named. 
Fixes #1821.
 2020-04-21 19:09:00 +02:00
Claire Wolf d834cc7afb Add '=' selection pattern prefix for non-blackbox only patterns 
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
 2020-04-21 14:23:24 +02:00
David Shah abf81c7639 sim: Fix handling of constant-connected cell inputs at startup 
Signed-off-by: David Shah <dave@ds0.me>
 2020-04-21 08:58:52 +01:00
Eddie Hung 3d7b983351 abc9: tolerate ABC nonzero exit code if output.aig; write before &mfs 
Re-enable mfs for xilinx/ecp5 speculatively -- if it fails, use pre-mfs
result
 2020-04-20 11:26:11 -07:00
Eddie Hung a998a4155d xilinx/ecp5: disable abc9's "&mfs" optimisation 
Can sometimes fire an assertion, e.g. #1962
 2020-04-20 10:30:10 -07:00
Eddie Hung 8c992ca47f abc9: -prep_lut to be more robust 2020-04-20 09:39:35 -07:00
David Shah 586739ecf3 qbfsat: Fix illegal use of 'stdout' identifier 
Signed-off-by: David Shah <dave@ds0.me>
 2020-04-17 08:42:39 +01:00
whitequark 69743aad42
Merge pull request #1864 from boqwxp/cleanup_techmap_abc 
Clean up pseudo-private member usage and simplify `passes/techmap/abc.cc`
 2020-04-17 02:25:18 +00:00
whitequark f2064c8131
Merge pull request #1888 from boqwxp/cleanup_scatter 
Clean up `passes/cmds/scatter.cc`.
 2020-04-17 02:21:23 +00:00
whitequark 5c428996a9
Merge pull request #1882 from boqwxp/cleanup_rename 
Clean up pseudo-private member usage in `passes/cmds/rename.cc`.
 2020-04-17 02:20:54 +00:00
Eddie Hung dac5adde12 design: -import to not count black/white-boxes as candidates for top 2020-04-16 12:46:07 -07:00
Eddie Hung 47c8ee7fe4 select: do not select inside blackboxes 2020-04-16 12:23:34 -07:00
Alberto Gonzalez 2e3647f567
Use `dict` instead of `std::map`. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-04-16 18:56:50 +00:00
Alberto Gonzalez b94f38295a
Revert to `stringf()` rather than stringstreams. 2020-04-16 18:56:50 +00:00
Alberto Gonzalez 6081c1bbd3
Clean up pseudo-private member usage in `passes/cmds/rename.cc`. 2020-04-16 18:56:50 +00:00
Alberto Gonzalez ff8be2364e
Replace `std::map` with `dict`. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-04-16 18:49:55 +00:00
Alberto Gonzalez 0424555702
Replace pseudo-private member access to `connections_` in `passes/cmds/scatter.cc`. 
Co-Authored-By: N. Engelhardt <nak@symbioticeda.com>
 2020-04-16 18:49:55 +00:00
Alberto Gonzalez 0787af947f
Clean up `passes/cmds/scatter.cc`. 2020-04-16 18:49:55 +00:00
Eddie Hung 254d38ca67 select: add select -unset option 2020-04-16 10:51:58 -07:00
Eddie Hung 8d3f6d0d79
Merge pull request #1928 from YosysHQ/eddie/design_delete 
kernel: add design -delete option
 2020-04-16 10:51:09 -07:00
Eddie Hung aa552cefa3
Merge pull request #1927 from YosysHQ/eddie/design_remove_assert 
kernel: Design::remove(RTLIL::Module *) to check refcount_modules_
 2020-04-16 08:06:12 -07:00
Eddie Hung a9ec0defb9 kernel: add design -delete option 2020-04-16 08:05:18 -07:00
Marcelina Kościelnicka 2f8541a92e opt_expr: Fix X and CO outputs for $alu identity-mapping rules. 2020-04-16 11:48:29 +02:00
Eddie Hung 33b0ac9269
Merge pull request #1933 from YosysHQ/eddie/zinit_more 
zinit: handle $__DFFS?E?_[NP][NP][01] too
 2020-04-15 08:36:25 -07:00
N. Engelhardt 0b7a5879e5
Merge pull request #1830 from boqwxp/qbfsat 
Add `qbfsat` command to integrate exists-forall solving and specialization
 2020-04-15 17:33:50 +02:00
David Shah 7ad8b24280
Merge pull request #1897 from YosysHQ/dave/bram-rejection-fix 
memory_bram: Fix ignorance of valid, matched rules
 2020-04-15 16:10:38 +01:00
Marcelina Kościelnicka 38a0c30d65 Get rid of dffsr2dff. 
This pass is a proper subset of opt_rmdff, which is called by opt, which
is called by every synth flow in the coarse part.  Thus, it never
actually does anything and can be safely removed.
 2020-04-15 16:22:37 +02:00
Marcelina Kościelnicka 85166633bc opt_clean: Add missing assignments to opt.did_something. 2020-04-15 16:20:56 +02:00
Marcelina Kościelnicka d7da491002 setundef: Improve error messages. 
Fixes #1092.
 2020-04-15 16:13:28 +02:00
Marcelina Kościelnicka 4c52691a58 abc9_ops: Add a check ensuring that connected port actually exists. 2020-04-15 08:11:15 +02:00
Eddie Hung a8ab74285b zinit: handle $__DFFS?E?_[NP][NP][01] too 2020-04-14 13:08:23 -07:00
Marcelina Kościelnicka 6c16fd760b opt_expr: Add more $alu optimizations. 
Detect the places in the $alu where the carry bit is constant (due to
const A[i] == B[i] ^ BI) and split it into smaller $alu at these points.

Also, make the existing const-carry detection for low bits more generic
(now handles cases where both BI and CI are constant, but not equal to
one another).

Fixes #1912.
 2020-04-14 21:48:13 +02:00
Marcelina Kościelnicka 7a36728b2f dffinit: Avoid setting init parameter to zero-length value. 
Fixes #1704.
 2020-04-14 19:52:19 +02:00
Eddie Hung 75bb2c8c24 design: do not delete when iterating over Design::modules() directly 2020-04-14 10:43:05 -07:00
Eddie Hung 3a27906ac6 abc9_exe: verify -> &verify -s 2020-04-14 08:21:26 -07:00
Eddie Hung 843201ec96 techmap: fix error message 2020-04-14 08:17:02 -07:00
Alberto Gonzalez 4ccaf048a5
Simplify `passes/techmap/abc.cc` and remove superfluous `RTLIL::SigSpec` constructions. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-04-14 02:39:44 +00:00
Eddie Hung b75c5bf743 zinit: resolve one more comment by @mwkmwkmwk 2020-04-13 15:25:37 -07:00
Eddie Hung c6afce7638 zinit: fix review comments from @mwkmwkmwk 2020-04-13 15:16:51 -07:00
Eddie Hung 70bca35f9c zinit: operate on $adff, erase (* init *) entries on consumption 2020-04-13 14:28:53 -07:00