clairexen
c7d71f436d
Merge pull request #2168 from whitequark/assert-unused-exprs
...
Use (and ignore) the expression provided to log_assert in NDEBUG builds
2020-06-25 18:21:51 +02:00
Marcelina Kościelnicka
8f12c5b063
simplemap: Fix $dffsre mapping.
2020-06-23 23:16:43 +02:00
Marcelina Kościelnicka
88e7f90663
Update dff2dffe, dff2dffs, zinit to new FF types.
2020-06-23 18:24:53 +02:00
Marcelina Kościelnicka
832acc8648
Add new FF types to simplemap.
2020-06-23 15:40:02 +02:00
whitequark
118e4caa37
Remove YS_ATTRIBUTE(unused) where present just for log_assert()/log_debug().
2020-06-19 15:48:58 +00:00
whitequark
7191dd16f9
Use C++11 final/override keywords.
2020-06-18 23:34:52 +00:00
Anonymous Maarten
60fb9cabcf
msvc does not support designated initializers in structs
2020-06-17 16:20:52 +02:00
whitequark
98e1080345
flatten: accept processes.
2020-06-09 09:56:23 +00:00
whitequark
fbb346ea91
flatten: preserve original object names via hdlname attribute.
2020-06-08 20:19:41 +00:00
whitequark
8d821dbbdb
flatten: only prepend $flatten once per wire.
2020-06-08 20:19:41 +00:00
whitequark
a1814b732f
flatten: make hygienic.
...
Before this commit, `flatten` matched the template objects with
the newly created objects solely by their name. Because of this,
it could be confused by code such as:
module bar();
$dff a();
endmodule
module foo();
bar b();
$dff \b.a ();
endmodule
After this commit, `flatten` avoids every possible case of name
collision.
Fixes #2106 .
2020-06-08 19:30:21 +00:00
clairexen
fbd0d8d5f0
Merge pull request #2105 from whitequark/split-flatten-off-techmap
...
Split `flatten` from `techmap` and simplify it
2020-06-08 15:27:15 +02:00
Eddie Hung
69850204c4
Merge pull request #2077 from YosysHQ/eddie/abc9_dff_improve
...
abc9: -dff improvements
2020-06-04 08:15:25 -07:00
whitequark
5a5a9b4ffe
flatten: clean up log messages.
2020-06-04 12:22:59 +00:00
whitequark
d731fe054b
flatten: topologically sort modules.
2020-06-04 12:22:59 +00:00
Eddie Hung
45cd323055
Merge pull request #2082 from YosysHQ/eddie/abc9_scc_fixes
...
abc9: fixes around handling combinatorial loops
2020-06-03 17:35:46 -07:00
whitequark
6268bdfe6f
flatten: simplify.
...
`flatten` cannot derive modules in most cases because that would just
yield processes, and it does not support `-autoproc`; in practice
`flatten` has to be preceded by a call to `hierarchy`, which makes
deriving unnecessary.
2020-06-04 00:02:12 +00:00
whitequark
d3e2100306
flatten: simplify. NFC.
...
Remove redundant sigmaps.
2020-06-04 00:02:12 +00:00
whitequark
66255dab4e
flatten: simplify.
...
Flattening does not benefit from topologically sorting cells within
a module when processing them.
2020-06-04 00:02:12 +00:00
whitequark
5d2b6d1394
flatten: simplify. NFC.
...
Flatten is non-recursive and doesn't need to keep track of handled
cells.
2020-06-04 00:02:12 +00:00
whitequark
3c3fa774e5
flatten: simplify. NFC.
...
Flattening always does "non-recursive" mapping.
2020-06-04 00:02:12 +00:00
whitequark
e561a3a76f
flatten: simplify. NFC.
...
The `celltypeMap` always maps `x` to `{x}`.
2020-06-04 00:02:12 +00:00
whitequark
6783876807
flatten: simplify. NFC.
...
The `design` and `map` designs are always the same when flattening.
2020-06-04 00:02:12 +00:00
whitequark
9338ff66b9
RTLIL: factor out RTLIL::Module::addMemory. NFC.
2020-06-04 00:02:12 +00:00
whitequark
ebbbe2156e
flatten: rename techmap-related stuff. NFC.
2020-06-04 00:02:12 +00:00
whitequark
76c4ee4ea5
techmap, flatten: remove dead options.
...
After splitting the passes, some options can never be activated,
and most conditions involving them become dead. Remove them, and also
all of the newly dead code.
2020-06-04 00:02:12 +00:00
whitequark
6ac54a74fe
flatten: split from techmap.
...
Although the two passes started out very similar, they diverged over
time and now have little in common. Moreover, `techmap` is extremely
complex while `flatten` does not have to be, and this complexity
interferes with improving `flatten`.
2020-06-03 15:34:03 +00:00
whitequark
fb5b070e7e
techmap: remove dead variable. NFC.
2020-06-03 01:44:06 +00:00
whitequark
0a74368bfc
techmap: use C++11 default member initializers. NFC.
2020-06-02 23:43:20 +00:00
whitequark
f3e86bb32a
techmap: simplify.
...
`rewrite_filename` is already called in `Frontend::extra_args`.
2020-06-02 23:43:20 +00:00
whitequark
68d747f767
techmap: use +/techmap.v instead of an ad-hoc code generator.
2020-06-02 23:43:20 +00:00
clairexen
ff785cdb46
Merge pull request #1862 from boqwxp/cleanup_techmap
...
Clean up `passes/techmap/techmap.cc`
2020-05-31 20:40:48 +02:00
Eddie Hung
08d9703ecb
abc9_ops: fix comment
2020-05-30 09:01:03 -07:00
Eddie Hung
ea4374a223
abc9_ops: update messaging (credit to @Xiretza for spotting)
2020-05-30 08:57:48 -07:00
Eddie Hung
b17e8495b8
abc9_ops: optimise to not derive unless attribute exists
2020-05-29 17:33:10 -07:00
Eddie Hung
d3b53bc495
abc9_ops: -reintegrate use SigMap to remove (* init *) from $_DFF_[NP]_
2020-05-29 17:17:40 -07:00
Eddie Hung
00c5ceb1f2
abc9_ops: -prep_xaiger exclude (* abc9_keep *) wires from toposort
2020-05-25 16:40:53 -07:00
Eddie Hung
7bad23f19c
abc9_ops: -reintegrate to preserve flop names
2020-05-25 08:43:33 -07:00
Eddie Hung
4f0f321169
abc9_ops: update comment
2020-05-21 21:39:13 -07:00
Eddie Hung
67fc0c3698
abc9: use (* abc9_keep *) instead of (* abc9_scc *); apply to $_DFF_?_
...
instead of moving them to $__ prefix
2020-05-14 16:44:35 -07:00
Alberto Gonzalez
e173291649
techmap: Replace naughty `const_cast<>()`s.
...
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-05-14 20:06:55 +00:00
Alberto Gonzalez
97fd304cbe
techmap: Replace pseudo-private member usage with the range accessor function and some naughty `const_cast<>()`s.
2020-05-14 20:06:55 +00:00
Eddie Hung
36bb201dd9
techmap: sort celltypeMap as it determines techmap order
2020-05-14 20:06:55 +00:00
Alberto Gonzalez
ce62d0751a
Replace `std::set`s using custom comparators with `pool`.
...
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-05-14 20:06:55 +00:00
Eddie Hung
dabeb1e8a1
techmap: prefix special wires with backslash for use as IdString
2020-05-14 20:06:55 +00:00
Alberto Gonzalez
bd54d67ad4
Further clean up `passes/techmap/techmap.cc`.
...
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
982562ff13
Use `emplace()` for more efficient insertion into various `dict`s.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
c658d9d59d
Build constant bits directly rather than constructing an object and copying its bits.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
f235f212ea
Replace `std::set` with `pool` for `cell_to_inbit` and `outbit_to_cell`.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
6294621825
Use `emplace()` rather than `insert()`.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
dfcb936cd5
Clean up pseudo-private member usage and ensure range iteration uses references where possible to avoid unnecessary copies.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
a4755c50c3
Clean up extraneous buffer.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
7857782575
Replace `std::map` with `dict` for `unique_bit_id`.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
6d64d768b0
Replace `std::map` with `dict` for `port_new2old_map`, `port_connmap`, and `cellbits_to_tplbits`.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
5cb4ae4666
Replace `std::map` with `dict` for `connbits_map`, `cell_to_inbit`, and `outbit_to_cell`.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
c43017fc08
Replace `std::map` with `dict` for `TechmapWires` type.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
644e55b3d3
Replace `std::map` with `dict` for `celltypeMap`.
2020-05-14 20:06:53 +00:00
Alberto Gonzalez
67f4046c05
Replace `std::set` with `pool` for `handled_cells` and `techmap_wire_names`.
2020-05-14 20:06:53 +00:00
Alberto Gonzalez
64c16f8c13
Replace `std::map` with `dict` for `positional_ports`.
2020-05-14 20:06:53 +00:00
Alberto Gonzalez
2fb4931e5b
Add specialized `hash()` for type `dict` and use a `dict` instead of a `std::map` for `techmap_cache` and `techmap_do_cache`.
2020-05-14 20:06:53 +00:00
Alberto Gonzalez
437f3fb342
Replace `std::map` with `dict` for `simplemap_mappers`.
2020-05-14 20:06:53 +00:00
Alberto Gonzalez
99b586b283
Use `nullptr` instead of `NULL` in `passes/techmap/techmap.cc`.
2020-05-14 20:06:53 +00:00
Alberto Gonzalez
5f7f213c7f
Replace `std::string` and `RTLIL::IdString` with `IdString` in `passes/techmap/techmap.cc`.
...
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-05-14 20:06:53 +00:00
Alberto Gonzalez
e49fdee404
Do not modify design modules while iterating over `modules()`.
...
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-05-14 20:06:53 +00:00
Alberto Gonzalez
985a29ff3b
Clean up pseudo-private member usage, superfluous `std::vector` instantiation, and `RTLIL::id2cstr()` usage in `passes/techmap/techmap.cc`.
2020-05-14 20:06:53 +00:00
Eddie Hung
02df0198b6
abc9_ops: -prep_hier to create unmap module that removes Q's (* init *)
2020-05-14 10:33:57 -07:00
Eddie Hung
13f9d65b6f
abc9: preserve $_DFF_?_.Q's (* init *); rely on clean to remove it
2020-05-14 10:33:57 -07:00
Eddie Hung
fa31e84112
Fix broken test when ignoring abc9_flop with init == 1'b1
2020-05-14 10:33:57 -07:00
Eddie Hung
97a0a04314
abc9_ops/xaiger: further reducing Module::derive() calls by ...
...
replacing _all_ (* abc9_box *) instantiations with their derived types
2020-05-14 10:33:57 -07:00
Eddie Hung
e79127fceb
Cleanup; reduce Module::derive() calls
2020-05-14 10:33:57 -07:00
Eddie Hung
8d34aee3d5
abc9: update to =_$abc9_flops pattern which includes whiteboxes
2020-05-14 10:33:57 -07:00
Eddie Hung
f652a9c11c
abc9_ops: update docs
2020-05-14 10:33:57 -07:00
Eddie Hung
57c478c537
abc9: only do +/abc9_map if `DFF
2020-05-14 10:33:57 -07:00
Eddie Hung
2946bb60e9
abc9: rework submod -- since it won't move (* keep *) cells
2020-05-14 10:33:56 -07:00
Eddie Hung
b65610fb62
abc9_ops: move assert
2020-05-14 10:33:56 -07:00
Eddie Hung
ed7cb0b095
abc9: put 'aigmap' back
2020-05-14 10:33:56 -07:00
Eddie Hung
b3e2538a14
abc9_ops: fix bypass boxes using (* abc9_bypass *)
2020-05-14 10:33:56 -07:00
Eddie Hung
d5a8aaba8c
abc9_ops: tidy up, suppress error if no boxes/holes
2020-05-14 10:33:56 -07:00
Eddie Hung
e2044fd9c7
abc9_ops: -prep_delays to not insert delay box if input connection is const
2020-05-14 10:33:56 -07:00
Eddie Hung
8b5fb99245
abc9_ops: cleanup; -prep_dff -> -prep_dff_submod
2020-05-14 10:33:56 -07:00
Eddie Hung
7cd3f4a79b
abc9_ops: add -prep_bypass for auto bypass boxes; refactor
...
Eliminate need for abc9_{,un}map.v in xilinx
-prep_dff_{hier,unmap} -> -prep_hier
2020-05-14 10:33:56 -07:00
Eddie Hung
bb840cca9c
abc9_ops: -reintegrate to handle $_FF_; cleanup
2020-05-14 10:33:56 -07:00
Eddie Hung
c50601e35e
abc9: restore selected_modules()
2020-05-14 10:33:56 -07:00
Eddie Hung
48052ad813
abc9: add flop boxes to basic $_DFF_P_ and $_DFF_N_ too
2020-05-14 10:33:56 -07:00
Eddie Hung
4cec21b93e
abc9_ops: -prep_dff_map to error if async flop found
2020-05-14 10:33:56 -07:00
Eddie Hung
c41c180f68
abc9: remove redundant wbflip
2020-05-14 10:33:56 -07:00
Eddie Hung
ec4bbb1444
abc9: generate $abc9_holes design instead of <name>$holes
2020-05-14 10:33:56 -07:00
Eddie Hung
c52bb11fb6
abc9_ops: more robust
2020-05-14 10:33:56 -07:00
Eddie Hung
8d7b3c06b2
abc9: suppress warnings when no compatible + used flop boxes formed
2020-05-14 10:33:56 -07:00
Eddie Hung
fb447951be
abc9: cleanup
2020-05-14 10:33:56 -07:00
Eddie Hung
8bad885e78
abc9_ops: -prep_dff_map to check $_DFF_[NP]_.Q drives module output
2020-05-14 10:33:56 -07:00
Eddie Hung
489e83fc1e
abc9_ops: do away with '$abc9_cells' selection
2020-05-14 10:33:56 -07:00
Eddie Hung
043ad8e76c
abc9_ops: use new 'design -delete' and 'select -unset'
2020-05-14 10:33:56 -07:00
Eddie Hung
e38b1280f9
abc9_ops: -prep_dff_map to warn if no specify cells
2020-05-14 10:33:56 -07:00
Eddie Hung
a1ae5845f8
abc9_ops: -prep_dff_map to cope with plain $_DFF_[NP]_ flops
2020-05-14 10:33:56 -07:00
Eddie Hung
6b3aa91a2a
abc9: cleanup
2020-05-14 10:33:56 -07:00
Eddie Hung
edacb8f437
abc9_ops: do not use (* abc9_init *)
2020-05-14 10:33:56 -07:00
Eddie Hung
95763c8d18
abc9_ops: add 'dff' label for auto handling of (* abc9_flop *) boxes
2020-05-14 10:33:56 -07:00
Eddie Hung
accfc70fc2
abc9: fix behaviour and help for -box option
2020-05-14 10:33:56 -07:00
Eddie Hung
da7da44919
abc9_ops: -reintegrate to be sensitive to start_offset too
2020-05-02 11:19:04 -07:00
whitequark
b43c282e4e
Add WASI platform support.
...
This includes the following significant changes:
* Patching ezsat and minisat to disable resource limiting code
on WASM/WASI, since the POSIX functions they use are unavailable.
* Adding a new definition, YOSYS_DISABLE_SPAWN, present if platform
does not support spawning subprocesses (i.e. Emscripten or WASI).
This definition hides the definition of `run_command()`.
* Adding a new Makefile flag, DISABLE_SPAWN, present in the same
condition. This flag disables all passes that require spawning
subprocesses for their function.
2020-04-30 18:56:25 +00:00
Eddie Hung
b048afc3a6
Merge pull request #1974 from YosysHQ/eddie/abc9_disable_mfs
...
abc9: tolerate &mfs failure by writing output file before calling it (and using that if it fails)
2020-04-23 06:43:30 -07:00
Eddie Hung
3d7b983351
abc9: tolerate ABC nonzero exit code if output.aig; write before &mfs
...
Re-enable mfs for xilinx/ecp5 speculatively -- if it fails, use pre-mfs
result
2020-04-20 11:26:11 -07:00
Eddie Hung
a998a4155d
xilinx/ecp5: disable abc9's "&mfs" optimisation
...
Can sometimes fire an assertion, e.g. #1962
2020-04-20 10:30:10 -07:00
Eddie Hung
8c992ca47f
abc9: -prep_lut to be more robust
2020-04-20 09:39:35 -07:00
whitequark
69743aad42
Merge pull request #1864 from boqwxp/cleanup_techmap_abc
...
Clean up pseudo-private member usage and simplify `passes/techmap/abc.cc`
2020-04-17 02:25:18 +00:00
Eddie Hung
33b0ac9269
Merge pull request #1933 from YosysHQ/eddie/zinit_more
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zinit: handle $__DFFS?E?_[NP][NP][01] too
2020-04-15 08:36:25 -07:00
Marcelina Kościelnicka
38a0c30d65
Get rid of dffsr2dff.
...
This pass is a proper subset of opt_rmdff, which is called by opt, which
is called by every synth flow in the coarse part. Thus, it never
actually does anything and can be safely removed.
2020-04-15 16:22:37 +02:00
Marcelina Kościelnicka
4c52691a58
abc9_ops: Add a check ensuring that connected port actually exists.
2020-04-15 08:11:15 +02:00
Eddie Hung
a8ab74285b
zinit: handle $__DFFS?E?_[NP][NP][01] too
2020-04-14 13:08:23 -07:00
Marcelina Kościelnicka
7a36728b2f
dffinit: Avoid setting init parameter to zero-length value.
...
Fixes #1704 .
2020-04-14 19:52:19 +02:00
Eddie Hung
3a27906ac6
abc9_exe: verify -> &verify -s
2020-04-14 08:21:26 -07:00
Eddie Hung
843201ec96
techmap: fix error message
2020-04-14 08:17:02 -07:00
Alberto Gonzalez
4ccaf048a5
Simplify `passes/techmap/abc.cc` and remove superfluous `RTLIL::SigSpec` constructions.
...
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-04-14 02:39:44 +00:00
Eddie Hung
b75c5bf743
zinit: resolve one more comment by @mwkmwkmwk
2020-04-13 15:25:37 -07:00
Eddie Hung
c6afce7638
zinit: fix review comments from @mwkmwkmwk
2020-04-13 15:16:51 -07:00
Eddie Hung
70bca35f9c
zinit: operate on $adff, erase (* init *) entries on consumption
2020-04-13 14:28:53 -07:00
Eddie Hung
1cdfdbc6d1
Fix S/R comment; thanks @mwkmwkmwk
2020-04-13 13:45:18 -07:00
Eddie Hung
4617aa8ccd
zinit to transform set/reset value of $_DFF_[NP][NP][01]_
2020-04-13 13:45:18 -07:00
Eddie Hung
b97a9cd3f3
Supress error for unhandled \init if whole module selected
2020-04-13 13:16:49 -07:00
Miodrag Milanovic
0d789c5a3b
Support custom PROGRAM_PREFIX
2020-04-10 10:38:40 +02:00
Alberto Gonzalez
83222193af
Clean up `passes/techmap/hilomap.cc`.
2020-04-09 05:28:32 +00:00
whitequark
79c6149069
Merge pull request #1865 from boqwxp/cleanup_dfflibmap
...
Clean up `passes/techmap/dfflibmap.cc`.
2020-04-06 10:56:22 +00:00
Alberto Gonzalez
f3e282a97c
Clean up `passes/techmap/dfflibmap.cc`.
2020-04-06 03:02:40 +00:00
Alberto Gonzalez
9168701881
Clean up pseudo-private member usage and simplify `passes/techmap/abc.cc`.
2020-04-05 21:31:18 +00:00
Alberto Gonzalez
64a32ead38
Clean up `passes/techmap/extract.cc`.
2020-04-05 19:36:23 +00:00
Eddie Hung
5f662b1c43
Merge pull request #1767 from YosysHQ/eddie/idstrings
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IdString: use more ID::*, make them easier to use, speed up IdString::in()
2020-04-02 11:47:25 -07:00
Eddie Hung
956ecd48f7
kernel: big fat patch to use more ID::*, otherwise ID(*)
2020-04-02 09:51:32 -07:00
Marcin Kościelnicki
2d3753d730
iopadmap: Fix z assignment to inout port
...
Fixes #1841 .
2020-04-02 18:15:04 +02:00
Claire Wolf
22ef5701c0
Merge pull request #1842 from YosysHQ/mwk/fix-deminout-xz
...
deminout: prevent any constant assignment from demoting to input
2020-04-02 18:14:34 +02:00
Eddie Hung
fdafb74eb7
kernel: use more ID::*
2020-04-02 07:14:08 -07:00
Eddie Hung
37f42fe102
Merge pull request #1845 from YosysHQ/eddie/kernel_speedup
...
kernel: speedup by using more pass-by-const-ref
2020-04-02 07:13:33 -07:00
Marcin Kościelnicki
f68985f997
deminout: prevent any constant assignment from demoting to input
...
Before this patch,
```
module top(inout io);
assign io = 1'bx;
endmodule
```
would have the `io` pin demoted to input (same happens for `1'bz`,
but not for `1'b0` or `1'b1`), resulting in check failures later on.
Part of fix for #1841 .
2020-03-30 15:04:31 +02:00
Claire Wolf
590d8eccb7
Merge pull request #1806 from YosysHQ/mwk/techmap-replace-fix
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techmap: Fix cell names with _TECHMAP_REPLACE_.*
2020-03-26 19:03:37 +01:00
Marcin Kościelnicki
c2bf11e42a
techmap: Fix cell names with _TECHMAP_REPLACE_.*
...
Fixes #1804 .
2020-03-23 11:17:07 +01:00
R. Ou
c34969d3f1
iopadmap: Attempt to give new wires/cells meaningful names
2020-03-22 23:01:09 +01:00
Eddie Hung
432a09af80
kernel: SigSpec use more const& + overloads to prevent implicit SigSpec
2020-03-13 08:17:39 -07:00
Eddie Hung
dd8ebf7873
Merge pull request #1743 from YosysHQ/eddie/abc9_keep
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abc9: improve (* keep *) handling
2020-03-11 06:32:15 -07:00
David Shah
f2550d45ff
Merge pull request #1753 from YosysHQ/dave/abc9-speedup
...
Add ScriptPass::run_nocheck and use for abc9
2020-03-10 13:51:59 +00:00
David Shah
ddcd87b577
Merge pull request #1721 from YosysHQ/dave/tribuf-unused
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deminout: Don't demote inouts with unused bits
2020-03-10 13:51:40 +00:00
David Shah
b8abf14376
Add ScriptPass::run_nocheck and use for abc9
...
Signed-off-by: David Shah <dave@ds0.me>
2020-03-09 14:34:22 +00:00
Eddie Hung
80dcc8a0d1
abc9: for sccs, create a new wire instead of using entirety of existing
2020-03-06 10:30:07 -08:00
Eddie Hung
91a7a74ac4
abc9: (* keep *) wires to be PO only, not PI as well; fix scc handling
2020-03-06 10:20:30 -08:00
Eddie Hung
2335c59e5b
abc: add abc.debug scratchpad option
2020-03-06 10:09:01 -08:00
David Shah
5cae9c6e16
deminout: Don't demote inouts with unused bits
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Signed-off-by: David Shah <dave@ds0.me>
2020-03-04 18:44:38 +00:00
Marcelina Kościelnicka
968956badb
iopadmap: Look harder for already-present buffers. ( #1731 )
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iopadmap: Look harder for already-present buffers.
Fixes #1720 .
2020-03-02 21:40:09 +01:00
Eddie Hung
78929e8c3d
Fixes for older compilers
2020-02-27 10:17:29 -08:00
Eddie Hung
88d5997c80
abc9_ops: suppress -prep_box warning for abc9_flop
2020-02-27 10:17:29 -08:00
Eddie Hung
6bb3d9f9c0
Make TimingInfo::TimingInfo(SigBit) constructor explicit
2020-02-27 10:17:29 -08:00
Eddie Hung
9dcf204dec
TimingInfo: index by (port_name,offset)
2020-02-27 10:17:29 -08:00