Eddie Hung
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66607845ec
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Remove Xilinx test
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2019-08-22 16:18:07 -07:00 |
Eddie Hung
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53fed4f7e9
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Actually, there might not be any harm in updating sigmap...
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2019-08-22 16:16:56 -07:00 |
Eddie Hung
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cfafd360d5
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Add comment as per @cliffordwolf
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2019-08-22 16:16:56 -07:00 |
Eddie Hung
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e7a8cdbccf
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Add shregmap -tech xilinx test
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2019-08-22 16:16:54 -07:00 |
Eddie Hung
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8691596d19
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Revert "Try way that doesn't involve creating a new wire"
This reverts commit 2f427acc9e .
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2019-08-22 16:16:34 -07:00 |
Eddie Hung
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5ff75b1cdc
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Try way that doesn't involve creating a new wire
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2019-08-22 16:16:34 -07:00 |
Eddie Hung
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e1fff34dde
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If d_bit already in sigbit_chain_next, create extra wire
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2019-08-22 16:16:34 -07:00 |
Eddie Hung
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c50d68653d
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Spelling
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2019-08-22 16:06:36 -07:00 |
Eddie Hung
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698a0e3aaf
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WIP for equivalency checking memories
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2019-08-22 16:05:12 -07:00 |
Eddie Hung
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43e7c4917a
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Do not print OKAY
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2019-08-22 16:05:12 -07:00 |
Eddie Hung
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65e6c23abd
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Spelling
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2019-08-22 16:05:12 -07:00 |
Eddie Hung
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5061d239ae
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Fail if iverilog fails
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2019-08-22 16:05:12 -07:00 |
Eddie Hung
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8e3754bdb4
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Hide tri-state warning message for now
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2019-08-22 16:05:12 -07:00 |
Eddie Hung
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659a481482
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Remove unused output
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2019-08-22 16:05:12 -07:00 |
Eddie Hung
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61087329ef
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Fix tribuf test
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2019-08-22 16:05:12 -07:00 |
Eddie Hung
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f9906eed68
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Fix comments
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2019-08-22 16:05:12 -07:00 |
Eddie Hung
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9224b3bc17
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Remove tech independent synthesis
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2019-08-22 16:05:12 -07:00 |
Eddie Hung
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388eb3288c
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Remove dffe instantation
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2019-08-22 16:04:50 -07:00 |
Eddie Hung
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9e537a76b5
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Move $dffe to dffs.{v,ys}
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2019-08-22 16:04:48 -07:00 |
Eddie Hung
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c5754d9e8b
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Make multiplier wider, do not do tech independent synth
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2019-08-22 16:04:07 -07:00 |
Miodrag Milanovic
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7fafaa896d
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do not require boost if pyosys is not used
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2019-08-22 11:57:46 -07:00 |
Chris Shucksmith
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68e673d687
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require tcl-tk in Brewfile
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2019-08-22 11:57:25 -07:00 |
Eddie Hung
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2fe35f902b
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Merge pull request #1322 from mmicko/pyosys_osx
do not require boost if pyosys is not used
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2019-08-22 11:53:27 -07:00 |
Eddie Hung
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6e8fda8bf0
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Add doc
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2019-08-22 11:52:24 -07:00 |
Miodrag Milanovic
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e5dac8096d
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do not require boost if pyosys is not used
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2019-08-22 20:43:52 +02:00 |
Eddie Hung
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926cd10350
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Merge pull request #1319 from TeaEngineering/shuckc/brew-tcl-tk
require tcl-tk in Brewfile
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2019-08-22 11:32:44 -07:00 |
Eddie Hung
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cabadb85e2
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Add copyright
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2019-08-22 11:25:19 -07:00 |
Eddie Hung
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7a9031c48e
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Add CHANGELOG entry
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2019-08-22 11:22:53 -07:00 |
Eddie Hung
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36d94caec1
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Remove `shregmap -tech xilinx` additions
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2019-08-22 11:22:09 -07:00 |
Eddie Hung
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9f3ed1726e
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pmgen to also iterate over all module ports
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2019-08-22 11:15:16 -07:00 |
Eddie Hung
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74bd190d3b
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Remove output_bits
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2019-08-22 11:14:59 -07:00 |
Eddie Hung
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231ddbf95c
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Forgot to set ud_variable.minlen
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2019-08-22 11:02:17 -07:00 |
Eddie Hung
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61639d5387
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Do not run xilinx_srl_pm in fixed loop
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2019-08-22 10:51:04 -07:00 |
Eddie Hung
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7188972645
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Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl
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2019-08-22 10:32:54 -07:00 |
Eddie Hung
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d0b2973413
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Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl
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2019-08-22 10:32:06 -07:00 |
Eddie Hung
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b800059fc1
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Merge pull request #1317 from YosysHQ/eddie/opt_expr_shiftx
opt_expr to trim A port of $shiftx/$shift
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2019-08-22 10:31:27 -07:00 |
Clifford Wolf
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5e0f6c9ae5
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Bump year in copyright notice
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-08-22 18:43:54 +02:00 |
Clifford Wolf
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e9f3eb9760
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Bump year in copyright notice
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-08-22 18:43:16 +02:00 |
Clifford Wolf
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151db528e4
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Fix missing newline at end of file
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-08-22 18:09:37 +02:00 |
Clifford Wolf
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2c8c8b3c74
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Merge pull request #1289 from mmicko/anlogic_fixes
Anlogic fixes and optimization
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2019-08-22 18:09:10 +02:00 |
Clifford Wolf
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4c449caf9b
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Fix missing newline at end of file
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-08-22 18:06:36 +02:00 |
Clifford Wolf
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4d37710e82
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Merge pull request #1281 from mmicko/efinix
Initial support for Efinix Trion series FPGAs
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2019-08-22 18:06:02 +02:00 |
Eddie Hung
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9245f0d3f5
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Copy-paste typo
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2019-08-22 08:43:44 -07:00 |
Chris Shucksmith
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d0322e9584
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require tcl-tk in Brewfile
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2019-08-22 16:37:40 +01:00 |
Eddie Hung
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6f971470f8
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Respect opt_expr -keepdc as per @cliffordwolf
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2019-08-22 08:37:27 -07:00 |
Eddie Hung
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379f33af54
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Handle $shift and Y_WIDTH > 1 as per @cliffordwolf
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2019-08-22 08:22:23 -07:00 |
Eddie Hung
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9e31f01b34
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Add cover()
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2019-08-22 08:06:24 -07:00 |
Eddie Hung
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d0ffe7544c
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Canonical form
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2019-08-22 08:05:01 -07:00 |
Clifford Wolf
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34a7c0209d
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Merge pull request #1316 from YosysHQ/eddie/fix_mem2reg
mem2reg to preserve user attributes and src
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2019-08-22 10:24:42 +02:00 |
Eddie Hung
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bb1a8a0190
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Add test
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2019-08-21 21:58:20 -07:00 |