riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
1,938 Commits 84 Branches 48 Tags 64 MiB
Commit Graph

3 Commits

Author SHA1 Message Date
Clifford Wolf b64b38eea2 Renamed $lut ports to follow A-Y naming scheme 2014-08-15 14:18:40 +02:00
Clifford Wolf 532091afcb Added more generic _TECHMAP_ wire mechanism to techmap pass 2013-11-23 15:58:06 +01:00
Clifford Wolf d635f8adaa Renamed techlibs/xilinx7 to techlibs/xilinx 2013-10-26 22:29:40 +02:00