Commit Graph

6 Commits

Author SHA1 Message Date
Eddie Hung c1ebe51a75 Revert "Try using an ICE40_CARRY_LUT primitive to avoid ABC issues"
This reverts commit a7632ab332.
2019-04-17 11:10:20 -07:00
Eddie Hung a7632ab332 Try using an ICE40_CARRY_LUT primitive to avoid ABC issues 2019-04-17 11:10:04 -07:00
Tim 'mithro' Ansell d6bdefd2e9 Improving vpr output support.
* Support output BLIF for Xilinx architectures.
 * Support using .names in BLIF for Xilinx architectures.
 * Use the same `NO_LUT` define in both `synth_ice40` and
  `synth_xilinx`.
2018-04-18 16:55:12 -07:00
Clifford Wolf 234726c655 Add "synth_ice40 -vpr" 2017-11-16 21:37:02 +01:00
Clifford Wolf 0d344a23d3 improved ice40 dff cell mapping 2015-04-16 11:30:56 +02:00
Clifford Wolf 42d5d94a5d Added very first version of "synth_ice40" 2015-03-05 20:37:55 +01:00