4 Commits

Author	SHA1	Message	Date
N. Engelhardt	48c1fdc33d	add qlf_k6n10f architecture + bram inference ... (Copied from QuickLogic Yosys plugin repo)	2023-12-04 15:52:02 +01:00
N. Engelhardt	98769010af	synth_quicklogic: rearrange files to prepare for adding more architectures	2023-12-04 15:52:02 +01:00
Lofty	dce037a62c	quicklogic: ABC9 synthesis	2021-04-17 20:54:58 +02:00
Lofty	f4298b057a	quicklogic: PolarPro 3 support ... Co-authored-by: Grzegorz Latosiński <glatosinski@antmicro.com> Co-authored-by: Maciej Kurc <mkurc@antmicro.com> Co-authored-by: Tarachand Pagarani <tpagarani@quicklogic.com> Co-authored-by: Lalit Sharma <lsharma@quicklogic.com> Co-authored-by: kkumar23 <kkumar@quicklogic.com>	2021-03-18 13:28:16 +01:00