Commit Graph

3721 Commits

Author SHA1 Message Date
whitequark d731fe054b flatten: topologically sort modules. 2020-06-04 12:22:59 +00:00
Eddie Hung 45cd323055
Merge pull request #2082 from YosysHQ/eddie/abc9_scc_fixes
abc9: fixes around handling combinatorial loops
2020-06-03 17:35:46 -07:00
whitequark 6268bdfe6f flatten: simplify.
`flatten` cannot derive modules in most cases because that would just
yield processes, and it does not support `-autoproc`; in practice
`flatten` has to be preceded by a call to `hierarchy`, which makes
deriving unnecessary.
2020-06-04 00:02:12 +00:00
whitequark d3e2100306 flatten: simplify. NFC.
Remove redundant sigmaps.
2020-06-04 00:02:12 +00:00
whitequark 66255dab4e flatten: simplify.
Flattening does not benefit from topologically sorting cells within
a module when processing them.
2020-06-04 00:02:12 +00:00
whitequark 5d2b6d1394 flatten: simplify. NFC.
Flatten is non-recursive and doesn't need to keep track of handled
cells.
2020-06-04 00:02:12 +00:00
whitequark 3c3fa774e5 flatten: simplify. NFC.
Flattening always does "non-recursive" mapping.
2020-06-04 00:02:12 +00:00
whitequark e561a3a76f flatten: simplify. NFC.
The `celltypeMap` always maps `x` to `{x}`.
2020-06-04 00:02:12 +00:00
whitequark 6783876807 flatten: simplify. NFC.
The `design` and `map` designs are always the same when flattening.
2020-06-04 00:02:12 +00:00
whitequark 9338ff66b9 RTLIL: factor out RTLIL::Module::addMemory. NFC. 2020-06-04 00:02:12 +00:00
whitequark ebbbe2156e flatten: rename techmap-related stuff. NFC. 2020-06-04 00:02:12 +00:00
whitequark 76c4ee4ea5 techmap, flatten: remove dead options.
After splitting the passes, some options can never be activated,
and most conditions involving them become dead. Remove them, and also
all of the newly dead code.
2020-06-04 00:02:12 +00:00
whitequark 6ac54a74fe flatten: split from techmap.
Although the two passes started out very similar, they diverged over
time and now have little in common. Moreover, `techmap` is extremely
complex while `flatten` does not have to be, and this complexity
interferes with improving `flatten`.
2020-06-03 15:34:03 +00:00
whitequark fb5b070e7e techmap: remove dead variable. NFC. 2020-06-03 01:44:06 +00:00
whitequark 0a74368bfc techmap: use C++11 default member initializers. NFC. 2020-06-02 23:43:20 +00:00
whitequark f3e86bb32a techmap: simplify.
`rewrite_filename` is already called in `Frontend::extra_args`.
2020-06-02 23:43:20 +00:00
whitequark 68d747f767 techmap: use +/techmap.v instead of an ad-hoc code generator. 2020-06-02 23:43:20 +00:00
clairexen ff785cdb46
Merge pull request #1862 from boqwxp/cleanup_techmap
Clean up `passes/techmap/techmap.cc`
2020-05-31 20:40:48 +02:00
Eddie Hung 08d9703ecb abc9_ops: fix comment 2020-05-30 09:01:03 -07:00
Eddie Hung fe273faad1
Merge pull request #2081 from YosysHQ/eddie/blackbox_ast
blackbox: use Module::makeblackbox() method
2020-05-30 08:59:20 -07:00
Eddie Hung ea4374a223 abc9_ops: update messaging (credit to @Xiretza for spotting) 2020-05-30 08:57:48 -07:00
clairexen ea46ed81f9
Merge pull request #2018 from boqwxp/qbfsat-timeout
smtbmc and qbfsat: Add timeout option to set solver timeouts for Z3, Yices, and CVC4.
2020-05-30 15:04:51 +02:00
Eddie Hung b17e8495b8 abc9_ops: optimise to not derive unless attribute exists 2020-05-29 17:33:10 -07:00
Eddie Hung d3b53bc495 abc9_ops: -reintegrate use SigMap to remove (* init *) from $_DFF_[NP]_ 2020-05-29 17:17:40 -07:00
clairexen 94c1035389
Merge pull request #1885 from Xiretza/mod-rem-cells
Fix modulo/remainder semantics
2020-05-29 16:37:23 +02:00
clairexen 5874a14d65
Merge pull request #2017 from boqwxp/qbfsat-cvc4
qbfsat: Add support for CVC4.
2020-05-29 16:23:10 +02:00
clairexen 1c8d5a08a0
Merge pull request #2016 from boqwxp/qbfsat-yices
qbfsat: Add `-solver` option and allow choice of Z3 or Yices, making Yices the default.
2020-05-29 16:21:45 +02:00
Xiretza edd8ff2c07
Add flooring division operator
The $div and $mod cells use truncating division semantics (rounding
towards 0), as defined by e.g. Verilog. Another rounding mode, flooring
(rounding towards negative infinity), can be used in e.g. VHDL. The
new $divfloor cell provides this flooring division.

This commit also fixes the handling of $div in opt_expr, which was
previously optimized as if it was $divfloor.
2020-05-28 22:59:04 +02:00
Xiretza 17163cf43a
Add flooring modulo operator
The $div and $mod cells use truncating division semantics (rounding
towards 0), as defined by e.g. Verilog. Another rounding mode, flooring
(rounding towards negative infinity), can be used in e.g. VHDL. The
new $modfloor cell provides this flooring modulo (also known as "remainder"
in several languages, but this name is ambiguous).

This commit also fixes the handling of $mod in opt_expr, which was
previously optimized as if it was $modfloor.
2020-05-28 22:59:03 +02:00
whitequark 0d99522b3c
Merge pull request #2095 from rswarbrick/hier-typo
Fix small typos in documentation for hierarchy command
2020-05-28 10:49:14 +00:00
Rupert Swarbrick 1158bbf7db Fix small typos in documentation for hierarchy command 2020-05-28 11:39:44 +01:00
Alberto Gonzalez 5896ffd56f
printattrs: Simplify `get_indent_str()`.
Co-Authored-By: Xiretza <xiretza@xiretza.xyz>
2020-05-28 05:34:28 +00:00
Alberto Gonzalez f671c99cb8
printattrs: Refactor indentation string building for clarity.
Co-Authored-By: whitequark <whitequark@whitequark.org>
2020-05-27 23:15:07 +00:00
Rupert Swarbrick d681c9df85 Pass some more args by reference in select.cc
Before this patch, the code passed around std::string objects by
value. It's probably not a hot-spot, but it can't hurt to avoid the
copying.

Removing the copy and clean-up code means the resulting code is ~6.1kb
smaller when compiled with GCC 9.3 and standard settings.
2020-05-27 09:42:23 +01:00
Rupert Swarbrick 061d1f0c07 Minor optimisations in select.cc's match_ids function
- Pass a string argument by reference

  - Avoid multiple calls to IdString::str and IdString::c_str

  - Avoid combining checks for size > 0 and first char (C strings are
    null terminated, so foo[0] != '\0' implies that foo has positive
    length)
2020-05-27 09:36:33 +01:00
Rupert Swarbrick 0d9beb5b2e Silence warning in select.cc
With GCC 9.3, at least, compiling select.cc spits out a warning about
an implausible bound being passed to strncmp. This comes from inlining
IdString::compare(): it turns out that passing std::string::npos as a
bound to strncmp triggers it.

This patch replaces the compare call with a memcmp with the same
effect. The repeated calls to IdString::c_str are slightly
inefficient, but I'll address that in a follow-up commit.
2020-05-27 09:34:15 +01:00
Alberto Gonzalez e50e4ee285
printattrs: Use `flags` to pretty-print the `RTLIL::Const` appropriately.
Co-Authored-By: whitequark <whitequark@whitequark.org>
2020-05-27 08:00:00 +00:00
Alberto Gonzalez b8365547e9
misc: Add `printattrs` command. 2020-05-27 08:00:00 +00:00
Rupert Swarbrick 7746bba69a Simplify a modport check in hierarchy.cc
This code originally comes from commit 458a940. When an interface is
used via a modport, code in genrtlil.cc sets '\\interface_type' and
'\\interface_modport' properties on the wire.

In hierarchy.cc, we pick up the modport name and add it to a dict
called modports_used_in_submodule (that maps connection source to
modport name).

Before this patch, the modport name is retrieved as a strpool and then
iterated over in an arbitrary order, discarding all entries but the
last. In practice, the pool will always have 0 or 1 entries because
the string used to construct it is a valid identifier, so doesn't
contain any pipe symbols.

This patch changes the code to retrieve the modport name as just a
string. This will have the same effect in practice, but may be a bit
less confusing!

The code also gets moved down closer to where the result is used,
which might be a bit more efficient since we won't always get as far
as the check.

The patch also removes some commented-out code, which I think was
intended to add some typechecking at some point, but was never
implemented. Since this dates back to October 2018, I think it makes
more sense to just take it out.
2020-05-26 16:50:42 +01:00
Eddie Hung 00c5ceb1f2 abc9_ops: -prep_xaiger exclude (* abc9_keep *) wires from toposort 2020-05-25 16:40:53 -07:00
Alberto Gonzalez 9847a4eea8
smtbmc and qbfsat: Add timeout option to set solver timeouts for Z3, Yices, and CVC4. 2020-05-25 20:39:30 +00:00
Alberto Gonzalez f9eef5e3f7
qbfsat: Add support for CVC4. 2020-05-25 20:39:03 +00:00
Alberto Gonzalez 903456c267
qbfsat: Add `-solver` option and allow choice of Z3 or Yices, making Yices the default.
Ensures that "BV" is the logic whenever solving an exists-forall problem with Yices, moves the "(set-logic ...)" directive above any non-info line, sets the `ef-max-iters` parameter to a very high number when using Yices in exists-forall mode so as not to prematurely abandon difficult problems, and does not provide the incompatible "--incremental" Yices argument when in exists-forall mode.
2020-05-25 20:38:29 +00:00
Eddie Hung 721283ac2a blackbox: re-use existing Module::makeblackbox() method 2020-05-25 10:53:49 -07:00
Eddie Hung 7bad23f19c abc9_ops: -reintegrate to preserve flop names 2020-05-25 08:43:33 -07:00
clairexen ae11156c90
Merge pull request #2015 from boqwxp/qbfsat-bisection
qbfsat: Add an iterative bisection optimization method and make it the default.
2020-05-25 15:50:18 +02:00
Alberto Gonzalez ac41f8a9c7
qbfsat: Remove cruft inadvertently left untouched in commit 86fc49a9d6. 2020-05-23 00:53:09 +00:00
Alberto Gonzalez aea0fd5ed4
qbfsat: Add bisection mode and make it the default.
Also adds `-nooptimize` and reorganizes `qbfsat.cc` a bit.
2020-05-23 00:53:09 +00:00
Eddie Hung 4f0f321169 abc9_ops: update comment 2020-05-21 21:39:13 -07:00
Miodrag Milanović 637650597b
Merge pull request #2059 from boqwxp/logger-vector-to-dict
log: Use `dict` instead of `std::vector<std::pair>` for `log_expect_{error, warning, log}` to better express the intent that each element is unique.
2020-05-21 15:36:30 +02:00
Eddie Hung 2d573a0ff6
Merge pull request #1926 from YosysHQ/eddie/abc9_auto_dff
abc9: support seq synthesis when module has (* abc9_flop *) and bypass non-combinatorial (* abc9_box *)
2020-05-18 08:06:50 -07:00
Alberto Gonzalez 8297afe925
log: Use `dict` instead of `std::vector<std::pair>` for `log_expect_{error, warning, log}` to better express the intent that each element is unique. 2020-05-15 00:55:32 +00:00
Eddie Hung 67fc0c3698 abc9: use (* abc9_keep *) instead of (* abc9_scc *); apply to $_DFF_?_
instead of moving them to $__ prefix
2020-05-14 16:44:35 -07:00
Eddie Hung 07eecff9cc
Merge pull request #2055 from YosysHQ/eddie/logger_multiple
logger: fix for multiple calls with same pattern
2020-05-14 15:30:08 -07:00
Alberto Gonzalez e173291649
techmap: Replace naughty `const_cast<>()`s.
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-05-14 20:06:55 +00:00
Alberto Gonzalez 97fd304cbe
techmap: Replace pseudo-private member usage with the range accessor function and some naughty `const_cast<>()`s. 2020-05-14 20:06:55 +00:00
Eddie Hung 36bb201dd9
techmap: sort celltypeMap as it determines techmap order 2020-05-14 20:06:55 +00:00
Alberto Gonzalez ce62d0751a
Replace `std::set`s using custom comparators with `pool`.
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-05-14 20:06:55 +00:00
Eddie Hung dabeb1e8a1
techmap: prefix special wires with backslash for use as IdString 2020-05-14 20:06:55 +00:00
Alberto Gonzalez bd54d67ad4
Further clean up `passes/techmap/techmap.cc`.
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-05-14 20:06:54 +00:00
Alberto Gonzalez 982562ff13
Use `emplace()` for more efficient insertion into various `dict`s. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez c658d9d59d
Build constant bits directly rather than constructing an object and copying its bits. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez f235f212ea
Replace `std::set` with `pool` for `cell_to_inbit` and `outbit_to_cell`. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez 6294621825
Use `emplace()` rather than `insert()`. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez dfcb936cd5
Clean up pseudo-private member usage and ensure range iteration uses references where possible to avoid unnecessary copies. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez a4755c50c3
Clean up extraneous buffer. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez 7857782575
Replace `std::map` with `dict` for `unique_bit_id`. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez 6d64d768b0
Replace `std::map` with `dict` for `port_new2old_map`, `port_connmap`, and `cellbits_to_tplbits`. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez 5cb4ae4666
Replace `std::map` with `dict` for `connbits_map`, `cell_to_inbit`, and `outbit_to_cell`. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez c43017fc08
Replace `std::map` with `dict` for `TechmapWires` type. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez 644e55b3d3
Replace `std::map` with `dict` for `celltypeMap`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 67f4046c05
Replace `std::set` with `pool` for `handled_cells` and `techmap_wire_names`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 64c16f8c13
Replace `std::map` with `dict` for `positional_ports`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 2fb4931e5b
Add specialized `hash()` for type `dict` and use a `dict` instead of a `std::map` for `techmap_cache` and `techmap_do_cache`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 437f3fb342
Replace `std::map` with `dict` for `simplemap_mappers`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 99b586b283
Use `nullptr` instead of `NULL` in `passes/techmap/techmap.cc`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 5f7f213c7f
Replace `std::string` and `RTLIL::IdString` with `IdString` in `passes/techmap/techmap.cc`.
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-05-14 20:06:53 +00:00
Alberto Gonzalez e49fdee404
Do not modify design modules while iterating over `modules()`.
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-05-14 20:06:53 +00:00
Alberto Gonzalez 985a29ff3b
Clean up pseudo-private member usage, superfluous `std::vector` instantiation, and `RTLIL::id2cstr()` usage in `passes/techmap/techmap.cc`. 2020-05-14 20:06:53 +00:00
Eddie Hung 7b3a4a1fff opt_expr: Sx to Sz; spotted by @Xiretza 2020-05-14 12:14:23 -07:00
Eddie Hung 73b7ea713c
Merge pull request #1994 from YosysHQ/eddie/fix_bug1758
opt_expr: improve single-bit $and/$or/$xor/$xnor cells; gate cells too
2020-05-14 11:56:22 -07:00
Eddie Hung 425867d175 logger: clean up doc 2020-05-14 10:38:31 -07:00
Eddie Hung 02df0198b6 abc9_ops: -prep_hier to create unmap module that removes Q's (* init *) 2020-05-14 10:33:57 -07:00
Eddie Hung 13f9d65b6f abc9: preserve $_DFF_?_.Q's (* init *); rely on clean to remove it 2020-05-14 10:33:57 -07:00
Eddie Hung fa31e84112 Fix broken test when ignoring abc9_flop with init == 1'b1 2020-05-14 10:33:57 -07:00
Eddie Hung 97a0a04314 abc9_ops/xaiger: further reducing Module::derive() calls by ...
replacing _all_ (* abc9_box *) instantiations with their derived types
2020-05-14 10:33:57 -07:00
Eddie Hung e79127fceb Cleanup; reduce Module::derive() calls 2020-05-14 10:33:57 -07:00
Eddie Hung 8d34aee3d5 abc9: update to =_$abc9_flops pattern which includes whiteboxes 2020-05-14 10:33:57 -07:00
Eddie Hung f652a9c11c abc9_ops: update docs 2020-05-14 10:33:57 -07:00
Eddie Hung 57c478c537 abc9: only do +/abc9_map if `DFF 2020-05-14 10:33:57 -07:00
Eddie Hung 2946bb60e9 abc9: rework submod -- since it won't move (* keep *) cells 2020-05-14 10:33:56 -07:00
Eddie Hung b65610fb62 abc9_ops: move assert 2020-05-14 10:33:56 -07:00
Eddie Hung ed7cb0b095 abc9: put 'aigmap' back 2020-05-14 10:33:56 -07:00
Eddie Hung b3e2538a14 abc9_ops: fix bypass boxes using (* abc9_bypass *) 2020-05-14 10:33:56 -07:00
Eddie Hung d5a8aaba8c abc9_ops: tidy up, suppress error if no boxes/holes 2020-05-14 10:33:56 -07:00
Eddie Hung e2044fd9c7 abc9_ops: -prep_delays to not insert delay box if input connection is const 2020-05-14 10:33:56 -07:00
Eddie Hung 8b5fb99245 abc9_ops: cleanup; -prep_dff -> -prep_dff_submod 2020-05-14 10:33:56 -07:00
Eddie Hung 7cd3f4a79b abc9_ops: add -prep_bypass for auto bypass boxes; refactor
Eliminate need for abc9_{,un}map.v in xilinx
-prep_dff_{hier,unmap} -> -prep_hier
2020-05-14 10:33:56 -07:00
Eddie Hung bb840cca9c abc9_ops: -reintegrate to handle $_FF_; cleanup 2020-05-14 10:33:56 -07:00
Eddie Hung c50601e35e abc9: restore selected_modules() 2020-05-14 10:33:56 -07:00
Eddie Hung 48052ad813 abc9: add flop boxes to basic $_DFF_P_ and $_DFF_N_ too 2020-05-14 10:33:56 -07:00
Eddie Hung 4cec21b93e abc9_ops: -prep_dff_map to error if async flop found 2020-05-14 10:33:56 -07:00
Eddie Hung c41c180f68 abc9: remove redundant wbflip 2020-05-14 10:33:56 -07:00
Eddie Hung ec4bbb1444 abc9: generate $abc9_holes design instead of <name>$holes 2020-05-14 10:33:56 -07:00
Eddie Hung c52bb11fb6 abc9_ops: more robust 2020-05-14 10:33:56 -07:00
Eddie Hung 8d7b3c06b2 abc9: suppress warnings when no compatible + used flop boxes formed 2020-05-14 10:33:56 -07:00
Eddie Hung fb447951be abc9: cleanup 2020-05-14 10:33:56 -07:00
Eddie Hung 8bad885e78 abc9_ops: -prep_dff_map to check $_DFF_[NP]_.Q drives module output 2020-05-14 10:33:56 -07:00
Eddie Hung 489e83fc1e abc9_ops: do away with '$abc9_cells' selection 2020-05-14 10:33:56 -07:00
Eddie Hung 043ad8e76c abc9_ops: use new 'design -delete' and 'select -unset' 2020-05-14 10:33:56 -07:00
Eddie Hung 509de98468 submod: revert accidental change 2020-05-14 10:33:56 -07:00
Eddie Hung e38b1280f9 abc9_ops: -prep_dff_map to warn if no specify cells 2020-05-14 10:33:56 -07:00
Eddie Hung a1ae5845f8 abc9_ops: -prep_dff_map to cope with plain $_DFF_[NP]_ flops 2020-05-14 10:33:56 -07:00
Eddie Hung 6b3aa91a2a abc9: cleanup 2020-05-14 10:33:56 -07:00
Eddie Hung edacb8f437 abc9_ops: do not use (* abc9_init *) 2020-05-14 10:33:56 -07:00
Eddie Hung 95763c8d18 abc9_ops: add 'dff' label for auto handling of (* abc9_flop *) boxes 2020-05-14 10:33:56 -07:00
Eddie Hung accfc70fc2 abc9: fix behaviour and help for -box option 2020-05-14 10:33:56 -07:00
Eddie Hung 65395168a0 logger: fix for multiple calls with same pattern 2020-05-14 10:32:07 -07:00
Eddie Hung cd92a706ae Fix whitespace 2020-05-14 09:51:17 -07:00
Eddie Hung 5be4b00a0d opt_clean: improve warning message 2020-05-14 00:59:38 -07:00
Eddie Hung fc9fb09a91 opt_clean: rminit without -purge; also remove if consistent with const..
warn otherwise
2020-05-14 00:31:08 -07:00
Eddie Hung 68b31f5e99 opt_clean: really make 'clean' identical to 'opt_clean' by rminit too 2020-05-14 00:31:08 -07:00
Eddie Hung 9694dc42dd opt_expr: consume_x to require/imply !keepdc 2020-05-08 11:12:43 -07:00
Eddie Hung 17f4e06247 opt_expr: restore consume_x; use for coarse grained too 2020-05-08 11:07:44 -07:00
Claire Wolf 0610424940
Merge pull request #2005 from YosysHQ/claire/fix1990
Add "nowrshmsk" attribute, fix shift-and-mask bit slice write for signed offset
2020-05-07 18:11:48 +02:00
Claire Wolf 5c82c19b4b
Merge pull request #2014 from YosysHQ/claire/fixoptalu
Fix the other "opt_expr -fine" bug introduced in 213a89558
2020-05-03 11:56:29 +02:00
Claire Wolf 2285cf1219 Fix the other "opt_expr -fine" bug introduced in 213a89558
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-05-02 21:50:43 +02:00
Claire Wolf 885deb4e88 Fix the other "opt_expr -fine" bug introduced in 213a89558
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-05-02 21:34:24 +02:00
Eddie Hung da7da44919 abc9_ops: -reintegrate to be sensitive to start_offset too 2020-05-02 11:19:04 -07:00
Claire Wolf c3e5a070ea Add plusargs for output files in test_autotb output
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-05-02 11:21:01 +02:00
Claire Wolf ca3fc3c882
Merge pull request #2010 from YosysHQ/claire/fixopt
Fix "opt_expr -fine" bug introduced in 213a89558
2020-05-02 11:20:02 +02:00
Claire Wolf 8ee32adac3 Fix "opt_expr -fine" bug introduced in 213a89558
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-05-01 20:12:16 +02:00
whitequark b43c282e4e Add WASI platform support.
This includes the following significant changes:
  * Patching ezsat and minisat to disable resource limiting code
    on WASM/WASI, since the POSIX functions they use are unavailable.
  * Adding a new definition, YOSYS_DISABLE_SPAWN, present if platform
    does not support spawning subprocesses (i.e. Emscripten or WASI).
    This definition hides the definition of `run_command()`.
  * Adding a new Makefile flag, DISABLE_SPAWN, present in the same
    condition. This flag disables all passes that require spawning
    subprocesses for their function.
2020-04-30 18:56:25 +00:00
Eddie Hung b5f38f8342 opt_expr: const_xnor replacement to pad Y with 1'b1 2020-04-24 14:13:45 -07:00
Eddie Hung 56dd036b97 bugpoint: improve messaging 2020-04-24 13:41:19 -07:00
Eddie Hung e602184856 bugpoint: (* keep *) to (* bugpoint_keep *); also apply to modules/cells 2020-04-24 13:26:04 -07:00
Eddie Hung 4bfe6ebea9 bugpoint: skip ports with (* keep *) on; add header 2020-04-24 11:17:09 -07:00
Eddie Hung 83570bc0da opt_expr: more fixes for $xor/$xnor 2020-04-24 11:15:29 -07:00
Eddie Hung 90b71eb84b opt_expr: do not group by X, more fixes 2020-04-23 18:15:07 -07:00
Eddie Hung e7058593f4 opt_expr: improve single-bit $and/$or/$xor/$xnor cells; gate cells too 2020-04-23 15:57:48 -07:00
Eddie Hung bf021a0e1f bugpoint: improve help text 2020-04-23 12:16:55 -07:00
Eddie Hung b048afc3a6
Merge pull request #1974 from YosysHQ/eddie/abc9_disable_mfs
abc9: tolerate &mfs failure by writing output file before calling it (and using that if it fails)
2020-04-23 06:43:30 -07:00
Claire Wolf dc9a72bc8d
Merge pull request #1989 from boqwxp/qbfsat_anyconst_sourcelocs
qbfsat: Make hole name recovery from source locations more robust.
2020-04-23 11:34:19 +02:00
Claire Wolf 1797c574da
Merge pull request #1988 from boqwxp/qbfsat
qbfsat: Add `-assume-negative-polarity` option.
2020-04-23 11:33:54 +02:00
Alberto Gonzalez 4ee8452d34
qbfsat: Make hole name recovery more robust. Allow multiple cell types to share the same source location as long as only one `$anyconst` or `$anyseq` has that location. 2020-04-23 05:45:44 +00:00
Alberto Gonzalez 7369e6b26b
qbfsat: Add `-assume-negative-polarity` option. 2020-04-23 04:06:15 +00:00
Eddie Hung 592baebd22 xilinx: xilinx_dsp_cascade to check CREG for DSP48E1 only 2020-04-22 17:43:25 -07:00
Eddie Hung fa9df06c9d
Merge pull request #1949 from YosysHQ/eddie/select_blackbox
select: do not select inside black-/white- boxes unless '=' prefix used
2020-04-22 15:35:05 -07:00
Claire Wolf beb9e4b299
Update passes/cmds/select.cc
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-04-22 21:31:32 +02:00
Eddie Hung 7f33a0294b Cleanup use of hard-coded default parameters in light of #1945 2020-04-22 12:02:30 -07:00
Eddie Hung eaa5a3e786 select: do not select black/white boxes by default, '=' prefix to do so 2020-04-22 10:15:56 -07:00
Eddie Hung 28623f19ee
Merge pull request #1950 from YosysHQ/eddie/design_import
design: -import to not count black/white-boxes as candidates for top
2020-04-22 09:32:13 -07:00
Claire Wolf c32b4bded5
Merge pull request #1976 from YosysHQ/dave/fix-sim-const
sim: Fix handling of constant-connected cell inputs at startup
2020-04-22 16:57:34 +02:00
Marcelina Kościelnicka cd82afb740 bugpoint: Don't remove modules or cells while iterating over them.
Reported by @ZirconiumX.
2020-04-22 00:09:01 +02:00
Marcelina Kościelnicka 846c79b312 hierarchy: Convert positional parameters to named.
Fixes #1821.
2020-04-21 19:09:00 +02:00
Claire Wolf d834cc7afb Add '=' selection pattern prefix for non-blackbox only patterns
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-04-21 14:23:24 +02:00
David Shah abf81c7639 sim: Fix handling of constant-connected cell inputs at startup
Signed-off-by: David Shah <dave@ds0.me>
2020-04-21 08:58:52 +01:00
Eddie Hung 3d7b983351 abc9: tolerate ABC nonzero exit code if output.aig; write before &mfs
Re-enable mfs for xilinx/ecp5 speculatively -- if it fails, use pre-mfs
result
2020-04-20 11:26:11 -07:00
Eddie Hung a998a4155d xilinx/ecp5: disable abc9's "&mfs" optimisation
Can sometimes fire an assertion, e.g. #1962
2020-04-20 10:30:10 -07:00
Eddie Hung 8c992ca47f abc9: -prep_lut to be more robust 2020-04-20 09:39:35 -07:00
David Shah 586739ecf3 qbfsat: Fix illegal use of 'stdout' identifier
Signed-off-by: David Shah <dave@ds0.me>
2020-04-17 08:42:39 +01:00
whitequark 69743aad42
Merge pull request #1864 from boqwxp/cleanup_techmap_abc
Clean up pseudo-private member usage and simplify `passes/techmap/abc.cc`
2020-04-17 02:25:18 +00:00
whitequark f2064c8131
Merge pull request #1888 from boqwxp/cleanup_scatter
Clean up `passes/cmds/scatter.cc`.
2020-04-17 02:21:23 +00:00
whitequark 5c428996a9
Merge pull request #1882 from boqwxp/cleanup_rename
Clean up pseudo-private member usage in `passes/cmds/rename.cc`.
2020-04-17 02:20:54 +00:00
Eddie Hung dac5adde12 design: -import to not count black/white-boxes as candidates for top 2020-04-16 12:46:07 -07:00
Eddie Hung 47c8ee7fe4 select: do not select inside blackboxes 2020-04-16 12:23:34 -07:00
Alberto Gonzalez 2e3647f567
Use `dict` instead of `std::map`.
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-04-16 18:56:50 +00:00
Alberto Gonzalez b94f38295a
Revert to `stringf()` rather than stringstreams. 2020-04-16 18:56:50 +00:00
Alberto Gonzalez 6081c1bbd3
Clean up pseudo-private member usage in `passes/cmds/rename.cc`. 2020-04-16 18:56:50 +00:00
Alberto Gonzalez ff8be2364e
Replace `std::map` with `dict`.
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-04-16 18:49:55 +00:00
Alberto Gonzalez 0424555702
Replace pseudo-private member access to `connections_` in `passes/cmds/scatter.cc`.
Co-Authored-By: N. Engelhardt <nak@symbioticeda.com>
2020-04-16 18:49:55 +00:00
Alberto Gonzalez 0787af947f
Clean up `passes/cmds/scatter.cc`. 2020-04-16 18:49:55 +00:00
Eddie Hung 254d38ca67 select: add select -unset option 2020-04-16 10:51:58 -07:00
Eddie Hung 8d3f6d0d79
Merge pull request #1928 from YosysHQ/eddie/design_delete
kernel: add design -delete option
2020-04-16 10:51:09 -07:00
Eddie Hung aa552cefa3
Merge pull request #1927 from YosysHQ/eddie/design_remove_assert
kernel: Design::remove(RTLIL::Module *) to check refcount_modules_
2020-04-16 08:06:12 -07:00
Eddie Hung a9ec0defb9 kernel: add design -delete option 2020-04-16 08:05:18 -07:00
Marcelina Kościelnicka 2f8541a92e opt_expr: Fix X and CO outputs for $alu identity-mapping rules. 2020-04-16 11:48:29 +02:00
Eddie Hung 33b0ac9269
Merge pull request #1933 from YosysHQ/eddie/zinit_more
zinit: handle $__DFFS?E?_[NP][NP][01] too
2020-04-15 08:36:25 -07:00
N. Engelhardt 0b7a5879e5
Merge pull request #1830 from boqwxp/qbfsat
Add `qbfsat` command to integrate exists-forall solving and specialization
2020-04-15 17:33:50 +02:00
David Shah 7ad8b24280
Merge pull request #1897 from YosysHQ/dave/bram-rejection-fix
memory_bram: Fix ignorance of valid, matched rules
2020-04-15 16:10:38 +01:00
Marcelina Kościelnicka 38a0c30d65 Get rid of dffsr2dff.
This pass is a proper subset of opt_rmdff, which is called by opt, which
is called by every synth flow in the coarse part.  Thus, it never
actually does anything and can be safely removed.
2020-04-15 16:22:37 +02:00
Marcelina Kościelnicka 85166633bc opt_clean: Add missing assignments to opt.did_something. 2020-04-15 16:20:56 +02:00
Marcelina Kościelnicka d7da491002 setundef: Improve error messages.
Fixes #1092.
2020-04-15 16:13:28 +02:00
Marcelina Kościelnicka 4c52691a58 abc9_ops: Add a check ensuring that connected port actually exists. 2020-04-15 08:11:15 +02:00
Eddie Hung a8ab74285b zinit: handle $__DFFS?E?_[NP][NP][01] too 2020-04-14 13:08:23 -07:00
Marcelina Kościelnicka 6c16fd760b opt_expr: Add more $alu optimizations.
Detect the places in the $alu where the carry bit is constant (due to
const A[i] == B[i] ^ BI) and split it into smaller $alu at these points.

Also, make the existing const-carry detection for low bits more generic
(now handles cases where both BI and CI are constant, but not equal to
one another).

Fixes #1912.
2020-04-14 21:48:13 +02:00
Marcelina Kościelnicka 7a36728b2f dffinit: Avoid setting init parameter to zero-length value.
Fixes #1704.
2020-04-14 19:52:19 +02:00
Eddie Hung 75bb2c8c24 design: do not delete when iterating over Design::modules() directly 2020-04-14 10:43:05 -07:00
Eddie Hung 3a27906ac6 abc9_exe: verify -> &verify -s 2020-04-14 08:21:26 -07:00
Eddie Hung 843201ec96 techmap: fix error message 2020-04-14 08:17:02 -07:00
Alberto Gonzalez 4ccaf048a5
Simplify `passes/techmap/abc.cc` and remove superfluous `RTLIL::SigSpec` constructions.
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-04-14 02:39:44 +00:00
Eddie Hung b75c5bf743 zinit: resolve one more comment by @mwkmwkmwk 2020-04-13 15:25:37 -07:00
Eddie Hung c6afce7638 zinit: fix review comments from @mwkmwkmwk 2020-04-13 15:16:51 -07:00
Eddie Hung 70bca35f9c zinit: operate on $adff, erase (* init *) entries on consumption 2020-04-13 14:28:53 -07:00
Eddie Hung 1cdfdbc6d1 Fix S/R comment; thanks @mwkmwkmwk 2020-04-13 13:45:18 -07:00
Eddie Hung 4617aa8ccd zinit to transform set/reset value of $_DFF_[NP][NP][01]_ 2020-04-13 13:45:18 -07:00
Eddie Hung b97a9cd3f3 Supress error for unhandled \init if whole module selected 2020-04-13 13:16:49 -07:00
Marcelina Kościelnicka 840bb17089 opt_expr: Optimize multiplications with low 0 bits in operands.
Fixes #1500.
2020-04-13 16:52:22 +02:00
Alberto Gonzalez e300766fb3
Use `pool` instead of `std::set`. 2020-04-11 09:41:09 +00:00
Alberto Gonzalez 73bd7fb01d
Use `dict` instead of `std::map`. 2020-04-11 06:53:59 +00:00
David Shah 85672a6c1f memory_bram: Fix ignorance of valid, matched rules
Signed-off-by: David Shah <dave@ds0.me>
2020-04-10 21:48:04 +01:00
whitequark 93ef516d91
Merge pull request #1603 from whitequark/ice40-ram_style
ice40/ecp5: add support for both 1364.1 and Synplify/LSE RAM/ROM attributes
2020-04-10 14:51:01 +00:00
Miodrag Milanovic 0d789c5a3b Support custom PROGRAM_PREFIX 2020-04-10 10:38:40 +02:00
Marcelina Kościelnicka 516857f3ba [NFCI] Deduplicate builtin FF cell types list
A few passes included the same list of FF cell types.  Make it a global
const instead.

The zinit pass also seems to include a list like that, but given that
it seems to be completely broken at the time (see #1568 discussion),
I'm going to pretend I didn't see that.
2020-04-09 18:05:06 +02:00
N. Engelhardt 7f33d43e3b
Merge pull request #1890 from boqwxp/cleanup_memory_collect
Clean up `passes/memory/memory_collect.cc`.
2020-04-09 14:01:29 +02:00
N. Engelhardt ed738b8ddb
Merge pull request #1889 from boqwxp/cleanup_memory_unpack
Clean up `passes/memory/memory_unpack.cc`.
2020-04-09 14:00:44 +02:00
Alberto Gonzalez de5e6fa56a
Clean up `passes/sat/qbfsat.cc`.
Makes various cosmetic fixes, removes superfluous `hasPort()` check, and uses `emplace_back()` instead of `push_back()`.
2020-04-09 07:47:44 +00:00
Alberto Gonzalez 652050b273
Clean up `passes/memory/memory_collect.cc`. 2020-04-09 05:43:05 +00:00
Alberto Gonzalez 685dc37d27
Clean up `passes/memory/memory_unpack.cc`. 2020-04-09 05:38:36 +00:00
Alberto Gonzalez 83222193af
Clean up `passes/techmap/hilomap.cc`. 2020-04-09 05:28:32 +00:00
whitequark 42e7e44207
Merge pull request #1857 from whitequark/splitnets-skip-processes
splitnets: skip modules with processes
2020-04-09 04:03:30 +00:00
Alberto Gonzalez 64a5936bd7
Clean up `passes/cmds/connect.cc`. 2020-04-08 22:11:06 +00:00
Alberto Gonzalez 194354e128
Remove `$anyconst` cells before specialization to eliminate warnings and the need to run `opt_clean`. 2020-04-07 03:29:54 +00:00
whitequark b350398c04
Merge pull request #1874 from boqwxp/cleanup_show
Clean up `passes/cmds/show.cc`.
2020-04-06 18:32:20 +00:00
whitequark 8ca12e0c42
Merge pull request #1861 from boqwxp/cleanup_hierarchy_submod
Clean up `passes/hierarchy/submod.cc`.
2020-04-06 18:32:10 +00:00
Alberto Gonzalez f4346a0400
Use more descriptive variable name.
Co-Authored-By: whitequark <whitequark@whitequark.org>
2020-04-06 14:48:27 +00:00
Alberto Gonzalez d6de14a0d6
Use more descriptive variable name.
Co-Authored-By: whitequark <whitequark@whitequark.org>
2020-04-06 14:37:07 +00:00
whitequark ebf23cd62e
Merge pull request #1870 from boqwxp/cleanup_setattr
Clean up `passes/cmds/setattr.cc`.
2020-04-06 11:04:49 +00:00
whitequark df95dc7d4a
Merge pull request #1872 from boqwxp/cleanup_copy
Clean up private member usage in `passes/cmds/copy.cc`.
2020-04-06 11:03:46 +00:00
whitequark 41f0c38478
Merge pull request #1871 from boqwxp/cleanup_splice
Clean up `passes/cmds/splice.cc`.
2020-04-06 11:03:34 +00:00
whitequark db66371915
Merge pull request #1869 from boqwxp/cleanup_connwrappers
Clean up `passes/cmds/connwrappers.cc`.
2020-04-06 11:01:44 +00:00
whitequark 30934e425d
Merge pull request #1868 from boqwxp/cleanup_delete
Clean up `passes/cmds/delete.cc`.
2020-04-06 10:58:38 +00:00
whitequark d3615ee445
Merge pull request #1867 from boqwxp/cleanup_stat
Clean up `passes/cmds/stat.cc`.
2020-04-06 10:58:02 +00:00
whitequark 75d39c6fdf
Merge pull request #1866 from boqwxp/cleanup_test_autotb
Clean up `passes/tests/test_autotb.cc`.
2020-04-06 10:56:45 +00:00
whitequark 79c6149069
Merge pull request #1865 from boqwxp/cleanup_dfflibmap
Clean up `passes/techmap/dfflibmap.cc`.
2020-04-06 10:56:22 +00:00
whitequark 8340660518
Merge pull request #1863 from boqwxp/cleanup_techmap_extract
Clean up `passes/techmap/extract.cc`.
2020-04-06 10:55:50 +00:00
whitequark 0d69d532e0
Merge pull request #1859 from boqwxp/design_duplicate
Add `-push-copy` option to the `design` command.
2020-04-06 10:39:26 +00:00
Alberto Gonzalez 57f48f94c2
Clean up `passes/cmds/show.cc`. 2020-04-06 08:51:25 +00:00
Alberto Gonzalez fdeeb48e62
Clean up private member usage in `passes/cmds/bugpoint.cc`. 2020-04-06 08:35:09 +00:00
Alberto Gonzalez 2dd09ab611
Clean up private member usage in `passes/cmds/copy.cc`. 2020-04-06 08:26:10 +00:00
Alberto Gonzalez 5e9c88501e
Clean up `passes/cmds/splice.cc`. 2020-04-06 07:42:46 +00:00
Alberto Gonzalez 2e27ddd511
Clean up `passes/cmds/setattr.cc`. 2020-04-06 06:52:18 +00:00
Alberto Gonzalez 968230261f
Clean up `passes/cmds/connwrappers.cc`. 2020-04-06 06:11:25 +00:00
Alberto Gonzalez 1226d41c61
Clean up `passes/cmds/delete.cc`. 2020-04-06 05:09:43 +00:00
Alberto Gonzalez b39a0d77ab
Clean up `passes/cmds/stat.cc`. 2020-04-06 04:39:18 +00:00
Alberto Gonzalez 438d2e0025
Clean up `passes/tests/test_autotb.cc`. 2020-04-06 04:25:21 +00:00
Alberto Gonzalez f3e282a97c
Clean up `passes/techmap/dfflibmap.cc`. 2020-04-06 03:02:40 +00:00
Alberto Gonzalez 9168701881
Clean up pseudo-private member usage and simplify `passes/techmap/abc.cc`. 2020-04-05 21:31:18 +00:00
Alberto Gonzalez 64a32ead38
Clean up `passes/techmap/extract.cc`. 2020-04-05 19:36:23 +00:00
Alberto Gonzalez 5431ce694c
Clean up `passes/hierarchy/submod.cc`. 2020-04-05 04:39:54 +00:00
Alberto Gonzalez 5fedd0931c
Use newly-renamed `-push-copy` option. 2020-04-04 22:22:54 +00:00
Alberto Gonzalez 0ca3a8e94f
Improve style in `passes/sat/qbfsat.cc`. 2020-04-04 22:13:27 +00:00
Alberto Gonzalez 1db73e8dd2
Gracefully report error when module has nothing to prove. 2020-04-04 22:13:27 +00:00
Alberto Gonzalez 8f0f13cad2
Suppress `yosys-smtbmc` output unless the new `-show-smtbmc` option is provided. 2020-04-04 22:13:27 +00:00
Alberto Gonzalez ce033a8e36
Fix handling of `-sat` and `-unsat` options when the solver returns `unknown`. 2020-04-04 22:13:26 +00:00
Alberto Gonzalez 6af8b767b4
Use `log_push()` and `log_pop()` and show the satisfiable model when `-specialize` is not specified.
Co-Authored-By: N. Engelhardt <nak@symbioticeda.com>
2020-04-04 22:13:26 +00:00
Alberto Gonzalez d311a80222
Clean up `qbfsat` command and fix AND-reduction of miter outputs. 2020-04-04 22:13:26 +00:00
Alberto Gonzalez 125a583c57
Use the `-duplicate` option rather than `-save` and `-load` with an explicit name.
Co-Authored-By: Claire Wolf <claire@symbioticeda.com>
2020-04-04 22:13:26 +00:00
Alberto Gonzalez 86fc49a9d6
Use internal `run_command()` API instead of `popen()`.
Co-Authored-By: Claire Wolf <claire@symbioticeda.com>
2020-04-04 22:13:26 +00:00
Alberto Gonzalez 09b2264837
Clean up manual casting.
Co-Authored-By: David Shah <dave@ds0.me>
2020-04-04 22:13:26 +00:00
Alberto Gonzalez acf96b6b0b
Remove unimplemented `-timeout` option. 2020-04-04 22:13:26 +00:00
Alberto Gonzalez bb101e0b3a
Implement the `-assume-outputs`, `-sat`, and -unsat` options for the `qbfsat` command. 2020-04-04 22:13:26 +00:00
Alberto Gonzalez 5527063f66
Add NDEBUG guards to `qbfsat` assertions. 2020-04-04 22:13:26 +00:00
Alberto Gonzalez 3a4fd4a999
Implement `-specialize-from-file` option for the `qbfsat` command. 2020-04-04 22:13:26 +00:00
Alberto Gonzalez b9e79e0bb7
Implement `-write-solution` option for the `qbfsat` command. 2020-04-04 22:13:26 +00:00
Alberto Gonzalez d07ac2612b
Clean up `passes/sat/qbfsat.cc`. 2020-04-04 22:13:26 +00:00
Alberto Gonzalez 437afa1f0c
Updated `yosys-smtbmc` to optionally dump raw bit strings, and fixed hole value recovery using that mode. 2020-04-04 22:13:25 +00:00
Alberto Gonzalez a4598d64ef
Hole value recovery and specialization implementation for `qbfsat` command. 2020-04-04 22:13:25 +00:00
Alberto Gonzalez 2fff574741
Barebones implementation of `qbfsat` command. 2020-04-04 22:13:25 +00:00
Alberto Gonzalez fb878b2a70
Initial skeleton for `qbfsat` command. 2020-04-04 22:13:25 +00:00
Alberto Gonzalez a0416fe167
Rename `-duplicate` to `-push-copy`.
Co-Authored-By: whitequark <whitequark@whitequark.org>
2020-04-04 21:26:11 +00:00
Alberto Gonzalez 409e2ac09d
Add `-duplicate` option to the `design` command. 2020-04-03 16:46:35 +00:00
whitequark 745251a31f splitnets: skip modules with processes. 2020-04-03 11:27:19 +00:00
whitequark e0def9e4d9 memory_map: add -attr option, to respect inference attributes.
Before this commit, memory_map (which is always a part of a synth
script) would always pick up any $mem cell that was not processed
by a preceding pass and lower it down to $dff/$mux cells.
This is undesirable for two reasons:
  * If there is an explicit inference attribute set on a $mem cell,
    e.g. (* ram_block *), then it is arguably incorrect to map such
    a memory to $dff/$mux cells.
  * If memory_map tries to lower a memory that was intended to
    be mapped to a large BRAM, it often takes extraordinarily long
    time to finish, produces an extremely large log file, and outputs
    an unusable design.

After this commit, properly invoked memory_map will not map any
memory that has an explicit inference attribute specified, solving
the first issue, and alleviating the second. The default behavior
is not changed.
2020-04-03 05:51:40 +00:00
Eddie Hung 5f662b1c43
Merge pull request #1767 from YosysHQ/eddie/idstrings
IdString: use more ID::*, make them easier to use, speed up IdString::in()
2020-04-02 11:47:25 -07:00
Eddie Hung 956ecd48f7 kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
Marcin Kościelnicki 2d3753d730 iopadmap: Fix z assignment to inout port
Fixes #1841.
2020-04-02 18:15:04 +02:00
Claire Wolf 22ef5701c0
Merge pull request #1842 from YosysHQ/mwk/fix-deminout-xz
deminout: prevent any constant assignment from demoting to input
2020-04-02 18:14:34 +02:00
Eddie Hung fdafb74eb7 kernel: use more ID::* 2020-04-02 07:14:08 -07:00
Eddie Hung 37f42fe102
Merge pull request #1845 from YosysHQ/eddie/kernel_speedup
kernel: speedup by using more pass-by-const-ref
2020-04-02 07:13:33 -07:00
Eddie Hung c90324662c
Merge pull request #1828 from YosysHQ/eddie/celltypes_speedup
kernel: share a single CellTypes within a pass
2020-04-01 14:17:45 -07:00
Eddie Hung 4ae7f3a8ed
Merge pull request #1790 from YosysHQ/eddie/opt_expr_xor
opt_expr: optimise $xor/$xnor/$_XOR_/$_XNOR_ -s with constant inputs
2020-04-01 14:17:01 -07:00
Eddie Hung e79bc45975
Merge pull request #1789 from YosysHQ/eddie/opt_expr_alu
opt_expr: improve performance on $alu and $sub
2020-04-01 14:11:09 -07:00
Eddie Hung 1bb5a5215f
Merge pull request #1761 from YosysHQ/eddie/opt_merge_speedup
opt_merge: speedup
2020-03-31 14:50:32 -07:00
Eddie Hung 3e88ede061
Merge pull request #1835 from boqwxp/cleanup_sat_expose
Clean up pseudo-private member usage in `passes/sat/expose.cc`.
2020-03-30 13:05:12 -07:00
Eddie Hung 0d878ca256
Merge pull request #1832 from boqwxp/cleanup_passes_cmds_design
Clean up pseudo-private member usage in `passes/cmds/design.cc`.
2020-03-30 11:56:17 -07:00
Eddie Hung 2c0739cbad
Merge pull request #1786 from boqwxp/hierarchycc_cleanup
Clean up pseudo-private member usage in `passes/hierarchy/hierarchy.cc`.
2020-03-30 11:37:51 -07:00
Eddie Hung 9f7d20a653
Merge pull request #1831 from boqwxp/cleanup_sat_eval
Clean up pseudo-private member usage in `passes/sat/eval.cc`.
2020-03-30 11:13:53 -07:00
Eddie Hung 769c7318e7
Merge pull request #1833 from boqwxp/cleanup_sat_freduce
Clean up pseudo-private member usage in `passes/sat/freduce.cc`.
2020-03-30 11:13:06 -07:00
Alberto Gonzalez 00544cffab
Remove unused function parameter. 2020-03-30 18:00:19 +00:00
Alberto Gonzalez 5a0f029e23
Simplify iterating over selected modules or cells.
Co-Authored-By: N. Engelhardt <nak@symbioticeda.com>
2020-03-30 17:56:07 +00:00
Alberto Gonzalez 7fc0938bb6
Replace `RTLIL::id2cstr()` with `log_id()`.
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-03-30 16:50:36 +00:00
Alberto Gonzalez 4c92f9380c
Fix double deletion in `passes/hierarchy/hierarchy.cc`.
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-03-30 16:43:54 +00:00
Alberto Gonzalez f4faa1514b
Further clean up `passes/sat/eval.cc`.
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-03-30 16:38:35 +00:00
Alberto Gonzalez 9f265dfd3f
Further clean up `passes/sat/freduce.cc`.
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-03-30 16:25:30 +00:00
Alberto Gonzalez 696660351f
Clean up more in `passes/sat/expose.cc`.
Co-Authored-By: N. Engelhardt <nak@symbioticeda.com>
2020-03-30 16:16:16 +00:00
Eddie Hung 1d93d1e59f memory_share: fix stray brace 2020-03-30 08:35:40 -07:00
Eddie Hung 4d897975a8 Code review fixes 2020-03-30 08:22:46 -07:00
Eddie Hung f64d59d824
Apply suggestions from code review
Co-Authored-By: Alberto Gonzalez <61295559+boqwxp@users.noreply.github.com>
2020-03-30 08:19:56 -07:00
Marcin Kościelnicki f68985f997 deminout: prevent any constant assignment from demoting to input
Before this patch,

```
module top(inout io);
assign io = 1'bx;
endmodule
```

would have the `io` pin demoted to input (same happens for `1'bz`,
but not for `1'b0` or `1'b1`), resulting in check failures later on.

Part of fix for #1841.
2020-03-30 15:04:31 +02:00
N. Engelhardt 2c847e7efe
Merge pull request #1778 from rswarbrick/sv-defines
Add support for SystemVerilog-style `define to Verilog frontend
2020-03-30 13:51:12 +02:00
Miodrag Milanovic 1dbc701728 Explicit include of csignal 2020-03-28 09:49:08 +01:00
Miodrag Milanovic 5cdcd6ec79 windows - there are no stopping signals 2020-03-28 09:09:11 +01:00
Alberto Gonzalez 1197a43380
Clean up pseudo-private member usage in `passes/sat/expose.cc`. 2020-03-28 06:18:09 +00:00
Alberto Gonzalez 9a0cdc3835
Clean up pseudo-private member usage in `passes/sat/freduce.cc`. 2020-03-28 06:08:23 +00:00
Alberto Gonzalez 4681f02a6e
Clean up pseudo-private member usage in `passes/cmds/design.cc`. 2020-03-28 05:10:18 +00:00
Alberto Gonzalez b63b2dbbc3
Clean up pseudo-private member usage in `passes/sat/eval.cc`. 2020-03-28 03:11:23 +00:00
Rupert Swarbrick 044ca9dde4 Add support for SystemVerilog-style `define to Verilog frontend
This patch should support things like

  `define foo(a, b = 3, c)   a+b+c

  `foo(1, ,2)

which will evaluate to 1+3+2. It also spots mistakes like

  `foo(1)

(the 3rd argument doesn't have a default value, so a call site is
required to set it).

Most of the patch is a simple parser for the format in preproc.cc, but
I've also taken the opportunity to wrap up the "name -> definition"
map in a type, rather than use multiple std::map's.

Since this type needs to be visible to code that touches defines, I've
pulled it (and the frontend_verilog_preproc declaration) out into a
new file at frontends/verilog/preproc.h and included that where
necessary.

Finally, the patch adds a few tests in tests/various to check that we
are parsing everything correctly.
2020-03-27 16:08:26 +00:00
Eddie Hung d40f12252b kernel: clear some more ShareWorker state 2020-03-26 15:05:45 -07:00
Claire Wolf 590d8eccb7
Merge pull request #1806 from YosysHQ/mwk/techmap-replace-fix
techmap: Fix cell names with _TECHMAP_REPLACE_.*
2020-03-26 19:03:37 +01:00
N. Engelhardt 3e46faa58c
Merge pull request #1763 from boqwxp/issue1762
Closes #1762. Adds warnings for `select` arguments not matching any object and for `add` command when no modules selected
2020-03-23 20:14:13 +01:00
Alberto Gonzalez 0da65d498b
Do not warn on empty selection with prefixed `arg_memb`.
Co-Authored-By: N. Engelhardt <nak@symbioticeda.com>
2020-03-23 17:50:11 +00:00
Alberto Gonzalez ca4e5dd56e
Suppress warnings for empty `select` arguments when `-count` or `-assert-*` options are set. 2020-03-23 17:30:53 +00:00
Marcin Kościelnicki c2bf11e42a techmap: Fix cell names with _TECHMAP_REPLACE_.*
Fixes #1804.
2020-03-23 11:17:07 +01:00
N. Engelhardt 91d12f4d59
Merge pull request #1785 from boqwxp/mitercc_cleanup
Clean up pseudo-private member usage in `passes/sat/miter.cc`.
2020-03-23 11:10:39 +01:00
Alberto Gonzalez 5026f36250
Warn on empty selection for `add` command. 2020-03-23 05:58:12 +00:00
R. Ou c34969d3f1 iopadmap: Attempt to give new wires/cells meaningful names 2020-03-22 23:01:09 +01:00
Eddie Hung 0c0dc4ffc3 opt_expr: fix failing $xnor test 2020-03-20 14:39:08 -07:00
Eddie Hung af16ca9dd4 opt_expr: fix missing brace 2020-03-20 09:17:53 -07:00
Eddie Hung 01f9aabc2f opt_expr: extend to $xnor and $_XNOR_ 2020-03-19 16:56:39 -07:00
Eddie Hung ee5995641e opt_expr: optimise 1-bit $xor or $_XOR_ with constant input 2020-03-19 16:33:54 -07:00
Eddie Hung 8d1fa0e3b9 opt_expr: remove redundant 2020-03-19 14:34:27 -07:00
Eddie Hung 213a895589 opt_expr: optimise $sub when both A[i] and B[i] == 1'b1 2020-03-19 14:34:10 -07:00
Eddie Hung a8e5d0c402 opt_expr: optimise for identity $alu-s just like $add/$sub 2020-03-19 14:24:55 -07:00
Marcin Kościelnicki e91368a5f4 fsm_extract: Initialize celltypes with full design.
Fixes #1781.
2020-03-19 18:51:21 +01:00
N. Engelhardt e03f725ef2
Merge pull request #1774 from boqwxp/exec
Add `exec` command to allow running shell commands from inside Yosys scripts
2020-03-19 13:14:43 +01:00
Alberto Gonzalez 6b626c2b0f
Clean up pseudo-private member usage in `passes/sat/miter.cc`. 2020-03-19 07:07:22 +00:00
Alberto Gonzalez b88faceced
Clean up pseudo-private member usage in `passes/hierarchy/hierarchy.cc`. 2020-03-19 06:49:52 +00:00
Eddie Hung 7ad7f41bc5 kernel: share a single CellTypes within a pass 2020-03-18 12:21:40 -07:00
Eddie Hung 4555b5b819 kernel: more pass by const ref, more speedups 2020-03-18 11:21:53 -07:00
Alberto Gonzalez 7ea7fb700b
Update copyright and license header.
I hereby assign to Claire Wolf the copyright for all work I did on `passes/cmds/exec.cc`.
In the event that this copyright assignment is not legally valid, I offer this work under the ISC license.
2020-03-18 09:17:31 +00:00
Alberto Gonzalez cbc5664d37
Clean up `exec` code according to review.
Co-Authored-By: Miodrag Milanović <mmicko@gmail.com>
2020-03-18 09:17:12 +00:00
Claire Wolf 7f5c73d58f Add N:* to select language, fix some old code
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-03-17 18:47:01 +01:00
Eddie Hung a2fa1654dc
Merge pull request #1769 from boqwxp/select_cleanup
Clean up code style and pseudo-private member usage in `passes/cmds/select.cc`
2020-03-17 10:43:45 -07:00
Alberto Gonzalez 9d9bbdce5d
Further clean up `passes/cmds/select.cc`.
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-03-16 20:35:19 +00:00
Alberto Gonzalez 70093698f5
Cleanup code style and pseudo-private member usage in `passes/cmds/select.cc`. 2020-03-16 20:35:11 +00:00
Eddie Hung cdf17c4455 opt_merge: unordered_map -> dict as per @cliffordwolf review 2020-03-16 12:44:33 -07:00
Eddie Hung 9f30d7f843 opt_merge: speedup 2020-03-16 12:43:54 -07:00
Alberto Gonzalez 8ba49a8462
Allow specifying multiple regexes to match in `exec` command output, and also to specify regexes that must _not_ match. 2020-03-16 07:52:57 +00:00
Alberto Gonzalez e6c09f1e0e
Add `exec` command to run shell commands. 2020-03-16 07:52:57 +00:00
Miodrag Milanovic 8f221118d2 Add YS_ prefix to macros, add explanation and apply to older version as well 2020-03-13 17:19:54 +01:00
Eddie Hung 432a09af80 kernel: SigSpec use more const& + overloads to prevent implicit SigSpec 2020-03-13 08:17:39 -07:00
Miodrag Milanovic 7c54e61979 Use boost xpressive for gcc 4.8 2020-03-13 14:58:35 +01:00
N. Engelhardt 6986371bac
Merge pull request #1751 from boqwxp/add_assert
Extend `add` command to allow adding $assert cells.
2020-03-12 11:18:35 +01:00
Eddie Hung dd8ebf7873
Merge pull request #1743 from YosysHQ/eddie/abc9_keep
abc9: improve (* keep *) handling
2020-03-11 06:32:15 -07:00
Alberto Gonzalez 005dd601ab
Extend `add` command to allow adding cells for verification like $assert, $assume, etc. 2020-03-10 21:49:22 +00:00
David Shah f2550d45ff
Merge pull request #1753 from YosysHQ/dave/abc9-speedup
Add ScriptPass::run_nocheck and use for abc9
2020-03-10 13:51:59 +00:00
David Shah ddcd87b577
Merge pull request #1721 from YosysHQ/dave/tribuf-unused
deminout: Don't demote inouts with unused bits
2020-03-10 13:51:40 +00:00
Alberto Gonzalez 47537f2e42
Clean up passes/cmds/add.cc code style. 2020-03-10 10:37:10 +00:00
David Shah b8abf14376 Add ScriptPass::run_nocheck and use for abc9
Signed-off-by: David Shah <dave@ds0.me>
2020-03-09 14:34:22 +00:00
Eddie Hung 80dcc8a0d1 abc9: for sccs, create a new wire instead of using entirety of existing 2020-03-06 10:30:07 -08:00
Eddie Hung 91a7a74ac4 abc9: (* keep *) wires to be PO only, not PI as well; fix scc handling 2020-03-06 10:20:30 -08:00
Eddie Hung 2335c59e5b abc: add abc.debug scratchpad option 2020-03-06 10:09:01 -08:00
David Shah 5cae9c6e16 deminout: Don't demote inouts with unused bits
Signed-off-by: David Shah <dave@ds0.me>
2020-03-04 18:44:38 +00:00
Claire Wolf 879124333f
Merge pull request #1519 from YosysHQ/eddie/submod_po
submod: several bugfixes
2020-03-03 08:19:06 -08:00
Marcelina Kościelnicka 968956badb
iopadmap: Look harder for already-present buffers. (#1731)
iopadmap: Look harder for already-present buffers.

Fixes #1720.
2020-03-02 21:40:09 +01:00
Eddie Hung 4f889b2f57
Merge pull request #1724 from YosysHQ/eddie/abc9_specify
abc9: auto-generate *.lut/*.box files and arrival/required times from specify entries
2020-03-02 12:32:27 -08:00
Eddie Hung de3e5fcdc6 ystests: fix write_smt2_write_smt2_cyclic_dependency_fail 2020-02-28 12:33:55 -08:00
Eddie Hung 78929e8c3d Fixes for older compilers 2020-02-27 10:17:29 -08:00
Eddie Hung 88d5997c80 abc9_ops: suppress -prep_box warning for abc9_flop 2020-02-27 10:17:29 -08:00
Eddie Hung 6bb3d9f9c0 Make TimingInfo::TimingInfo(SigBit) constructor explicit 2020-02-27 10:17:29 -08:00
Eddie Hung 9dcf204dec TimingInfo: index by (port_name,offset) 2020-02-27 10:17:29 -08:00
Eddie Hung 7c3b4b80ea Fix spacing 2020-02-27 10:17:29 -08:00
Eddie Hung d6cff77751 abc9_ops: still emit delay table even box has no timing 2020-02-27 10:17:29 -08:00
Eddie Hung 683c5ce940 abc9_ops: demote lack of box timing info to warning 2020-02-27 10:17:29 -08:00
Eddie Hung 1ef1ca812b Get rid of (* abc9_{arrival,required} *) entirely 2020-02-27 10:17:29 -08:00
Eddie Hung a6fec9fe60 abc9_ops: use TimingInfo for -prep_{lut,box} too 2020-02-27 10:17:29 -08:00
Eddie Hung 3ea5506f81 abc9_ops: use TimingInfo for -prep_{lut,box} too 2020-02-27 10:17:29 -08:00
Eddie Hung cda4acb544 abc9_ops: add and use new TimingInfo struct 2020-02-27 10:17:29 -08:00
Eddie Hung e22fee6cdd abc9_ops: ignore (* abc9_flop *) if not '-dff' 2020-02-27 10:17:29 -08:00
Eddie Hung 7c92b6852f abc9_ops: sort LUT delays to be ascending 2020-02-27 10:17:29 -08:00
Eddie Hung 7317521c6f abc9_ops: output LUT area 2020-02-27 10:17:29 -08:00
Eddie Hung 0ed550d83c abc9_ops: cope with T_LIMIT{,2}_{MIN,TYP,MAX} and auto-gen small LUTs 2020-02-27 10:17:29 -08:00
Eddie Hung 12d70ca8fb xilinx: improve specify functionality 2020-02-27 10:17:29 -08:00
Eddie Hung 577545488a xilinx: use specify blocks in place of abc9_{arrival,required} 2020-02-27 10:17:29 -08:00
Eddie Hung 0e7c55e2a7 Auto-generate .box/.lut files from specify blocks 2020-02-27 10:17:29 -08:00
Eddie Hung 3d6603792d abc9_ops: assert on $specify2 properties 2020-02-27 10:17:29 -08:00
Eddie Hung 74f49b1f55 abc9_ops: -prep_box, to be called once 2020-02-27 10:17:29 -08:00
Eddie Hung 5643c1b8c5 abc9_ops: -prep_lut and -write_lut to auto-generate LUT library 2020-02-27 10:17:29 -08:00
Claire Wolf ab8826ae36
Merge pull request #1709 from rqou/coolrunner2_counter
Improve CoolRunner-II optimization by using extract_counter pass
2020-02-27 19:05:56 +01:00
Miodrag Milanović 036c46de1e
Merge pull request #1705 from YosysHQ/logger_pass
Logger pass
2020-02-26 13:32:49 +01:00
Miodrag Milanovic 48eed2860c Fix line endings 2020-02-23 10:05:21 +01:00
Miodrag Milanovic 010d651450 Update explanation for expect-no-warnings 2020-02-22 10:53:23 +01:00
Miodrag Milanovic 596bb2d443 Check other regex parameters 2020-02-22 10:31:56 +01:00
Alberto Gonzalez 750e7a9a54
Closes #1714. Fix make failure when NDEBUG=1. 2020-02-22 06:29:11 +00:00
Eddie Hung 760096e8d2
Merge pull request #1703 from YosysHQ/eddie/specify_improve
Improve specify parser
2020-02-21 09:15:17 -08:00
Miodrag Milanovic 419e67c170 check for regex errors 2020-02-20 11:41:37 +01:00
Eddie Hung 1d401a7991 clean: ignore specify-s inside cells when determining whether to keep 2020-02-19 10:45:10 -08:00
Miodrag Milanovic 5641b0248f Option to expect no warnings 2020-02-17 15:36:06 +01:00
R. Ou fec7dc5c9e extract_counter: Implement extracting up counters 2020-02-17 03:08:52 -08:00
R. Ou 940bab6841 extract_counter: Add support for inverted clock enable 2020-02-17 03:08:52 -08:00
R. Ou 5fc180ed2d extract_counter: Fix clock enable 2020-02-17 03:08:52 -08:00
R. Ou 12fa4a3121 extract_counter: Fix outputting count to module port 2020-02-17 03:08:52 -08:00
R. Ou 508f1ff6a1 extract_counter: Allow forbidding async reset 2020-02-17 03:08:52 -08:00
R. Ou 7b922c0d89 extract_counter: Refactor out extraction settings into struct 2020-02-17 03:08:52 -08:00
Tim 'mithro' Ansell b9dfdbbfee show: Add -nobg argument.
Makes yosys wait for the viewer command to finish before continuing.
2020-02-15 14:03:16 +01:00
Eddie Hung f9f86fd758 Revert "abc9: fix abc9_arrival for flops"
This reverts commit f7c0dbecee.
2020-02-14 16:08:04 -08:00
Miodrag Milanovic 31b7a9c312 Add expect option to logger command 2020-02-14 12:21:16 +01:00
Eddie Hung 0cf7598cd6
Merge pull request #1700 from YosysHQ/eddie/abc9_fixes
Use (* abc9_init *) attribute, fix use of abc9_arrival for flops
2020-02-13 17:32:54 -08:00
Eddie Hung 3d2a2e8799 iopadmap: fixes as suggested by @mwkmwkmwk 2020-02-13 14:57:06 -08:00
Eddie Hung f7c0dbecee abc9: fix abc9_arrival for flops 2020-02-13 12:34:09 -08:00
Eddie Hung 00d41905df abc9: deprecate abc9_ff.init wire for (* abc9_init *) attr 2020-02-13 12:33:58 -08:00
Eddie Hung ebb11bcea4 iopadmap: move \init attributes from outpad output to its input 2020-02-13 12:05:14 -08:00
Miodrag Milanovic 0ba2a2b1fa Add new logger pass 2020-02-13 13:35:29 +01:00
Eddie Hung c244b27b6d abc9: cleanup 2020-02-10 10:17:23 -08:00
Eddie Hung e6bb7b0782 Fix misc.abc9.abc9_abc9_luts 2020-02-07 08:27:45 -08:00
whitequark 60f047f136 memory_bram: add `attr_icase` option.
Some vendor toolchains use case insensitive matching for values of
attributes that control BRAM inference.
2020-02-06 14:58:20 +00:00
Eddie Hung 505557e93e
Merge pull request #1576 from YosysHQ/eddie/opt_merge_init
opt_merge: discard \init of '$' cells with 'Q' port when merging
2020-02-05 14:56:26 -08:00
Eddie Hung 0b308c6835 abc9_ops: -reintegrate to use derived_type for box_ports 2020-02-05 14:46:48 -08:00
Eddie Hung 5ebdc0f8e0
Merge pull request #1638 from YosysHQ/eddie/fix1631
clk2fflogic: work for bit-level $_DFF_* and $_DFFSR_*
2020-02-05 19:31:18 +01:00
Eddie Hung 0671ae7d79
Merge pull request #1661 from YosysHQ/eddie/abc9_required
abc9: add support for required times
2020-02-05 18:59:40 +01:00
Marcelina Kościelnicka 34d2fbd2f9
Add opt_lut_ins pass. (#1673) 2020-02-03 14:57:17 +01:00
David Shah 4bfd2ef4f3 sv: Improve handling of wildcard port connections
Signed-off-by: David Shah <dave@ds0.me>
2020-02-02 16:12:33 +00:00
David Shah 7e741714df hierarchy: Correct handling of wildcard port connections with default values
Signed-off-by: David Shah <dave@ds0.me>
2020-02-02 16:12:33 +00:00
David Shah 5df591c023 hierarchy: Resolve SV wildcard port connections
Signed-off-by: David Shah <dave@ds0.me>
2020-02-02 16:12:33 +00:00
David Shah 1055b6b1dd
Merge pull request #1657 from YosysHQ/dave/xilinx-dsp-multonly
synth_xilinx: add -dsp-multonly
2020-02-02 14:53:32 +00:00
David Shah 65716c9982 xilinx_dsp: Add multonly scratchpad var to bypass
Signed-off-by: David Shah <dave@ds0.me>
2020-02-01 15:30:43 +00:00
Eddie Hung 136842b1ef Merge branch 'master' into eddie/submod_po 2020-02-01 02:14:19 -08:00
Gabriel Somlo 8106c3d31b abc9: restore ability to use ABCEXTERNAL
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
2020-01-30 15:12:43 -05:00
Claire Wolf 1679682fa3 Merge branch 'vector_fix' of https://github.com/Kmanfi/yosys
Also some minor fixes to the original PR.
2020-01-29 17:01:24 +01:00
Claire Wolf 4d0118d0c1
Merge pull request #1662 from YosysHQ/dave/opt-reduce-move-check
opt_reduce: Call check() per run rather than per optimised cell
2020-01-29 15:27:11 +01:00
Eddie Hung a855f23f22 Merge remote-tracking branch 'origin/master' into eddie/opt_merge_init 2020-01-28 12:46:18 -08:00
Eddie Hung 7939727d14
Merge pull request #1660 from YosysHQ/eddie/abc9_unpermute_luts
Unpermute LUT ordering for ice40/ecp5/xilinx
2020-01-28 11:55:51 -08:00
Claire Wolf 4ddaa70fd6
Merge pull request #1567 from YosysHQ/eddie/sat_init_warning
sat: suppress 'Warning: ignoring initial value on non-register: ...' when init[i] = 1'bx
2020-01-28 17:40:28 +01:00
N. Engelhardt 086c133ea5
Merge pull request #1573 from YosysHQ/eddie/xilinx_tristate
synth_xilinx: error out if tristate without '-iopad'
2020-01-28 17:24:54 +01:00
David Shah 6fd9cae5ca opt_reduce: Call check() per run rather than per optimised cell
Signed-off-by: David Shah <dave@ds0.me>
2020-01-28 09:42:01 +00:00
Pepijn de Vos 409e532433 redirect fuser stderr to /dev/null 2020-01-28 10:02:41 +01:00
Eddie Hung 21ce1b37fb abc9_ops: -check for negative arrival/required times 2020-01-27 14:22:46 -08:00
Eddie Hung e18aeda7ed Fix $lut input ordering -- SigSpec(std::initializer_list<>) is backwards
Just like Verilog...
2020-01-27 14:02:13 -08:00
Eddie Hung 48f3f5213e
Merge pull request #1619 from YosysHQ/eddie/abc9_refactor
Refactor `abc9` pass
2020-01-27 13:29:15 -08:00
Eddie Hung f2576c096c Merge branch 'eddie/abc9_refactor' into eddie/abc9_required 2020-01-27 12:29:28 -08:00
Eddie Hung 9009b76a69 abc9_ops: add comments 2020-01-27 11:18:21 -08:00
Eddie Hung b178761551 ice40: reduce ABC9 internal fanout warnings with a param for CI->I3 2020-01-24 11:59:48 -08:00
Eddie Hung dbf351390e abc9: -reintegrate recover type from existing cell, check against boxid 2020-01-23 22:45:34 -08:00
Eddie Hung 245873d42d abc9: warning message if no modules selected 2020-01-23 19:08:51 -08:00
Eddie Hung f180dba753 abc9_ops: -prep_xaiger to skip (* keep *) cells 2020-01-23 18:56:06 -08:00
Eddie Hung 1d4314d888 abc9_ops -prep_dff: insert async s/r mux in holes when replacing $_DFF_* 2020-01-23 14:58:56 -08:00
Eddie Hung af0e7637a2 alumacc: undo accidental commit 2020-01-22 20:54:03 -08:00
Eddie Hung 8eb5bb258c Merge remote-tracking branch 'origin/eddie/abc9_fixes' into eddie/abc9_refactor 2020-01-22 12:30:14 -08:00
Eddie Hung a94b41011d abc9: error out if flip-flop init is 1'b1 for '-dff'
Due to ABC sequential synthesis restriction
2020-01-22 10:08:48 -08:00
Eddie Hung 3b44b53e94 abc9: fix scratchpad entry abc9.verify 2020-01-22 09:36:54 -08:00
Eddie Hung 3d9737c1bd Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor 2020-01-21 16:27:40 -08:00
Claire Wolf 5791c52e1b
Merge pull request #1637 from YosysHQ/mwk/fix-1634
fsm_detect: Add a cache to avoid excessive CPU usage for big mux networks.
2020-01-21 18:37:06 +01:00
Claire Wolf f165a74824
Merge pull request #1621 from YosysHQ/clifford/fminit
Add fminit pass
2020-01-20 22:01:57 +01:00
Eddie Hung 6a163b5ddd xilinx_dsp: another typo; move xilinx specific test 2020-01-17 17:07:03 -08:00
Eddie Hung db68e4c2a7 ice40_dsp: fix typo 2020-01-17 16:08:04 -08:00
Eddie Hung e17f3f8c63 Consistency 2020-01-17 16:06:20 -08:00
Eddie Hung ee500b6d8e xilinx_dsp: add parameter defaults 2020-01-17 16:05:10 -08:00
Eddie Hung 4985318263 ice40_dsp: add default values for parameters 2020-01-17 15:37:52 -08:00
Eddie Hung 6692e5d558 ice40_dsp: tolerant of fanout-less outputs, as well as all-zero inputs 2020-01-17 15:28:02 -08:00
Eddie Hung d4e188299b abc9: add some log_{push,pop}() as per @nakengelhardt 2020-01-17 12:00:14 -08:00
Eddie Hung 5a63c19747 abc9_ops: -write_box is empty, output a dummy box to prevent ABC error 2020-01-15 13:14:48 -08:00
Eddie Hung e30b6bbbf8 clk2fflogic: work for bit-level $_DFF_* and $_DFFSR_* 2020-01-15 09:51:31 -08:00
Eddie Hung 485e08e436 abc9_ops: cope with (* abc9_flop *) in place of (* abc9_box_id *) 2020-01-14 16:33:41 -08:00
Eddie Hung f60e071e1c abc9_ops: -check to check abc9_{arrival,required} 2020-01-14 15:24:44 -08:00
Eddie Hung 1c88a6c240 abc9_ops: implement a requireds_cache 2020-01-14 15:20:04 -08:00
Eddie Hung 0e4285ca0d abc9_ops: generate flop box ids, add abc9_required to FD* cells 2020-01-14 15:05:49 -08:00
Eddie Hung 588a713b54 Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_required 2020-01-14 14:28:07 -08:00
Eddie Hung 4656f202c6 abc9_ops: -reintegrate to not trim box padding anymore 2020-01-14 14:27:29 -08:00
Eddie Hung b951ca9e1c abc9_ops: fix -reintegrate handling of $__ABC9_DELAY 2020-01-14 14:06:02 -08:00
Marcin Kościelnicki a5d2358a60 fsm_detect: Add a cache to avoid excessive CPU usage for big mux networks.
Fixes #1634.
2020-01-14 22:49:20 +01:00
Eddie Hung ec95fbb273 abc9_ops: -prep_times -> -prep_delays; add doc 2020-01-14 13:21:58 -08:00
Eddie Hung 593897ffc0 abc9_ops: cleanup 2020-01-14 13:13:15 -08:00
Eddie Hung 300003cb78 abc9_ops: discard $__ABC9_DELAY boxes 2020-01-14 13:09:54 -08:00
Eddie Hung 915e7dde73 Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_required 2020-01-14 12:57:56 -08:00
Eddie Hung 654247abe9 abc9_ops/write_xaiger: update doc 2020-01-14 12:40:36 -08:00
Eddie Hung 468386d67d abc9_ops: -prep_holes -> -prep_xaiger, move padding to write_xaiger 2020-01-14 12:25:45 -08:00
Eddie Hung 53a99ade9c Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor 2020-01-14 11:46:56 -08:00
Eddie Hung 61ffd2d199
Merge pull request #1633 from YosysHQ/eddie/fix_autoname
autoname: do not rename ports
2020-01-14 11:40:54 -08:00
Eddie Hung de969adcd8 autoname: do not autoname ports 2020-01-14 10:13:29 -08:00
Eddie Hung 531fddf797 abc9_ops: -break_scc -> -mark_scc using (* keep *), remove -unbreak_scc 2020-01-13 23:42:27 -08:00
Eddie Hung b678b15c6d abc9_ops: ignore inouts of all cell outputs for topo ordering 2020-01-13 23:33:37 -08:00
Eddie Hung 2c65e1abac abc9: break SCC by setting (* keep *) on output wires 2020-01-13 21:45:27 -08:00
Eddie Hung a2c4d98da7 abc9: add -run option 2020-01-13 19:22:23 -08:00
Eddie Hung a6d4ea7463 abc9: respect (* keep *) on cells 2020-01-13 19:21:11 -08:00
Eddie Hung 766e16b525 read_aiger: make $and/$not/$lut the prefix not suffix 2020-01-13 17:34:37 -08:00
Eddie Hung 808b388e34 abc9: log which module is being operated on 2020-01-13 09:43:57 -08:00
Eddie Hung 9f3cb981d7 Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor 2020-01-13 09:22:42 -08:00
Eddie Hung f9aae90e7a Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_required 2020-01-12 15:19:41 -08:00
Eddie Hung 295e241c07 cleanup 2020-01-11 17:28:24 -08:00
Eddie Hung 79db12f238 Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor 2020-01-11 17:26:25 -08:00
Eddie Hung 556ed0e18a MIssed this merge conflict 2020-01-11 17:05:30 -08:00
Eddie Hung c063436eea Merge remote-tracking branch 'origin/master' into eddie/abc9_scratchpad 2020-01-11 17:02:20 -08:00
Eddie Hung 11128dccb5 Merge branch 'eddie/abc9_refactor' of github.com:YosysHQ/yosys into eddie/abc9_refactor 2020-01-11 13:56:41 -08:00
Eddie Hung c820682314 abc9: fix help message, found by @nakengelhardt 2020-01-11 12:11:35 -08:00
Eddie Hung 784fec93c9 abc9: cleanup 2020-01-11 08:42:58 -08:00
Eddie Hung 45d9caf3f9 abc9: remove -nomfs option 2020-01-11 08:08:35 -08:00
Eddie Hung f24de88f38 log_debug() for abc9_{arrival,required} times 2020-01-10 17:13:27 -08:00
Eddie Hung ed2aeb498e Copy-pasta 2020-01-10 15:09:42 -08:00
Eddie Hung 291530c59f abc9: add abc9.verify and abc9.debug options 2020-01-10 15:04:13 -08:00
Eddie Hung 475d983676 abc9_ops -prep_times: generate flop boxes from abc9_required attr 2020-01-10 14:49:52 -08:00
Eddie Hung e0af812180 abc9_ops -prep_times: update comment 2020-01-10 12:38:49 -08:00
Eddie Hung b2259a9201 Add abc9_ops -check, -prep_times, -write_box for required times 2020-01-10 11:45:41 -08:00
Eddie Hung 1f7893bd8c abc9: fix memory leak 2020-01-10 10:46:06 -08:00
Eddie Hung d1f8371481 abc9: fix typos 2020-01-10 10:00:09 -08:00
Eddie Hung e378902f93 Tune abc9.script.flow 2020-01-09 18:16:58 -08:00
Eddie Hung 8b6309747b Add '-v' to &if for abc9.script.default.fast 2020-01-09 17:49:56 -08:00
Eddie Hung 32946a402d abc9: start post-fix with semicolon 2020-01-09 17:35:13 -08:00
Eddie Hung ca70f96503 abc9.script.* constpad entries to start with '+' 2020-01-09 17:17:47 -08:00
Eddie Hung ef3e84aac9 Revert "abc9: if -script value is a file, then source it, otherwise commands"
This reverts commit 0696b7bc9e.
2020-01-09 17:11:09 -08:00
Eddie Hung 67c9c41f7e Move abc9.* constpad entries to Abc9Pass::on_register() 2020-01-09 17:10:54 -08:00
Eddie Hung 5e280a3b59 abc9_exe: -box to not require -lut 2020-01-09 14:04:10 -08:00
Clifford Wolf 3fa374a698 Add fminit pass
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2020-01-09 21:22:54 +01:00
Eddie Hung 4e396ee7a3 abc9_ops: fix reintegration by removing optimised-away boxes 2020-01-09 11:21:03 -08:00
Eddie Hung 589ffead5c scratchpad entry abc9.if.R to &if -R 2020-01-08 12:13:06 -08:00
Eddie Hung 0696b7bc9e abc9: if -script value is a file, then source it, otherwise commands 2020-01-08 12:11:55 -08:00
Eddie Hung 050f03f15b abc9: add time as last script command 2020-01-08 10:55:44 -08:00
Eddie Hung e230fd8afe Fix {C} substitution 2020-01-08 10:52:08 -08:00
Eddie Hung a63e2508fc Add RTLIL::constpad, init by yosys_setup(); use for abc9 2020-01-08 10:52:08 -08:00
Eddie Hung 88f14b8bca Cleanup 2020-01-08 10:02:45 -08:00