Clifford Wolf
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10e5791c5e
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Refactoring: Renamed RTLIL::Design::modules to modules_
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2014-07-27 11:18:30 +02:00 |
Clifford Wolf
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4c4b602156
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Refactoring: Renamed RTLIL::Module::cells to cells_
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2014-07-27 01:51:45 +02:00 |
Clifford Wolf
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f9946232ad
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Refactoring: Renamed RTLIL::Module::wires to wires_
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2014-07-27 01:49:51 +02:00 |
Clifford Wolf
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b7dda72302
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Changed users of cell->connections_ to the new API (sed command)
git grep -l 'connections_' | xargs sed -i -r -e '
s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g;
s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g;
s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g;
s/(->|\.)connections_.push_back/\1connect/g;
s/(->|\.)connections_/\1connections()/g;'
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2014-07-26 15:58:23 +02:00 |
Clifford Wolf
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cc4f10883b
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Renamed RTLIL::{Module,Cell}::connections to connections_
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2014-07-26 11:58:03 +02:00 |
Clifford Wolf
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2bec47a404
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Use only module->addCell() and module->remove() to create and delete cells
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2014-07-25 17:56:19 +02:00 |
Clifford Wolf
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4b4048bc5f
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SigSpec refactoring: using the accessor functions everywhere
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2014-07-22 20:39:37 +02:00 |
Clifford Wolf
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a233762a81
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SigSpec refactoring: renamed chunks and width to __chunks and __width
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2014-07-22 20:39:37 +02:00 |
Clifford Wolf
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99b9c56da1
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Fixed detection of init attribute in opt_rmdff
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2014-02-04 23:00:32 +01:00 |
Clifford Wolf
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ecdf1f5577
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Improved handling of reg init in opt_share and opt_rmdff
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2014-02-04 12:02:47 +01:00 |
Clifford Wolf
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83fa652820
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Added constant-clock case to opt_rmdff
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2014-02-02 21:09:08 +01:00 |
Clifford Wolf
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2e370d5a2f
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Added support for $adff with undef data inputs to opt_rmdff
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2014-01-17 16:42:40 +01:00 |
Clifford Wolf
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ccd2a93439
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Added log_abort() api
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2013-05-24 12:32:06 +02:00 |
Clifford Wolf
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3b8882ae49
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Some improvements in opt_rmdff
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2013-05-23 07:48:18 +02:00 |
Clifford Wolf
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36954471a6
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Added help messages for opt_* passes
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2013-03-01 09:01:49 +01:00 |
Clifford Wolf
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7764d0ba1d
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initial import
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2013-01-05 11:13:26 +01:00 |