Marcelina Kościelnicka
c9251eb26b
memory_dff: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
557f81cb49
proc_dlatch: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
31d6107521
pmux2shift: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
4d9105ccb0
wreduce: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
7b1a4fc1e6
techmap: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
9e72be3ae8
shregmap: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
522f367db3
abc: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
336b8c7786
dffinit: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
1c8483b7dd
zinit: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
e98382f6e2
dfflegalize: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
abe4e9e607
clk2fflogic: Support all FF types.
2020-07-24 03:19:48 +02:00
Marcelina Kościelnicka
eae2edf3e4
memory_dff: recognize more dff cells
2020-07-23 20:55:28 +02:00
Marcelina Kościelnicka
dc07ae9677
techmap: Add _TECHMAP_CELLNAME_ special parameter.
...
This parameter will resolve to the name of the cell being mapped. The
first user of this parameter will be synth_intel_alm's Quartus output,
which requires a unique (and preferably descriptive) name passed as
a cell parameter for the memory cells.
2020-07-21 15:00:54 +02:00
Alberto Gonzalez
2f786fcfac
qbfsat: Add `-solver-option` option.
2020-07-20 21:54:56 +00:00
Marcelina Kościelnicka
61a7ec4768
opt_merge: Dedup one more use of FF cell type list.
2020-07-15 06:19:18 +02:00
Marcelina Kościelnicka
b33744b03a
proc_dlatch: Remove init values for combinatorial processes.
...
Fixes #2258 .
2020-07-12 18:50:30 +02:00
Marcelina Kościelnicka
240351c44e
dfflegalize: Gather init values from all wires.
...
Skipping non-selected wires is unsound in an obvious way.
2020-07-12 17:39:13 +02:00
Marcelina Kościelnicka
7ed9d18907
dfflibmap: Refactor to use dfflegalize internally.
2020-07-09 18:51:03 +02:00
Marcelina Kościelnicka
32d2cc8c28
clkbufmap: improve input pad handling.
...
- allow inserting only the input pad cell
- do not insert the usual buffer if the input pad already acts as a
buffer
2020-07-09 18:48:01 +02:00
Marcelina Kościelnicka
03e28f7ab4
clk2fflogic: Consistently treat async control signals as negative hold.
...
This fixes some dfflegalize equivalence checks, and breaks others — and
I strongly suspect the others are due to bad support for multiple
async inputs in `proc` (in particular, lack of proper support for
dlatchsr and sketchy circuits on dffsr control inputs).
2020-07-09 18:12:47 +02:00
Marcelina Kościelnicka
e9c2c1b717
dfflegalize: Add special support for const-D latches.
...
Those can be created by `opt_dff` when optimizing `$adff` with const
clock, or with D == Q. Make dfflegalize do the opposite transform
when such dlatches would be otherwise unimplementable.
2020-07-09 18:11:32 +02:00
Marcelina Kościelnicka
943147b768
dfflegalize: typo fix
2020-07-07 15:00:52 +02:00
Marcelina Kościelnicka
af54b8bc61
Naming fixes.
2020-07-05 22:21:59 +02:00
Marcelina Kościelnicka
f3f55ae7c2
dfflegalize: Prefer mapping dff to sdff before adff
...
This ensures that, when both sync and async FFs are available and abc9
is involved, the sync FFs will be used, and will thus remain available
for sequential synthesis.
2020-07-05 12:01:43 +02:00
Marcelina Kościelnicka
7afcb72c98
opt_expr: Fix crash on $mul optimization with more zeros removed than Y has.
...
Fixes #2221 .
2020-07-05 06:31:58 +02:00
Eddie Hung
27a9d1b6e6
abc9: only techmap (* abc9_flop *) modules
2020-07-04 19:45:10 +02:00
Eddie Hung
0ba79feb6f
abc9: techmap from user design to allow abc9_flop modules to be composed
...
from other primitives
2020-07-04 19:45:10 +02:00
Rupert Swarbrick
a9b61080a4
Add newlines to help text for dfflegalize
...
I think these were probably missed by accident. Spotted because GCC
spits out lots of messages like this:
passes/techmap/dfflegalize.cc:114:7: warning: zero-length gnu_printf format string [-Wformat-zero-length]
114 | log("");
| ^~
(because we tell GCC that the first argument to log() looks like a
printf control string in log.h, and a zero length such string triggers
a warning).
2020-07-03 12:30:12 +02:00
clairexen
e4b9e64d1b
Merge pull request #2208 from boqwxp/qbfsat-cleanup
...
qbfsat: Cleanup and refactoring
2020-07-02 17:48:37 +02:00
clairexen
5428666151
Merge pull request #2186 from YosysHQ/mwk/dfflegalize
...
Add dfflegalize pass.
2020-07-02 17:46:11 +02:00
clairexen
d3422f8a5e
Merge pull request #2211 from YosysHQ/mwk/fix-fmcombine-ff
...
fmcombine: use the master ff cell type list
2020-07-02 17:43:48 +02:00
clairexen
5dbf91847a
Merge pull request #2210 from YosysHQ/mwk/fix-opt_merge
...
opt_merge: use the master FF type list
2020-07-02 17:43:34 +02:00
Alberto Gonzalez
56f98b9e3d
qbfsat: Remove useless comment and #ifndef guards.
2020-07-01 19:55:16 +00:00
Alberto Gonzalez
3345d39e6f
qbfsat: Specify default values for some options in the help message.
2020-07-01 19:55:16 +00:00
Alberto Gonzalez
95e8016811
qbfsat: Clean up external executable command lines and update temporary directory name.
2020-07-01 19:55:16 +00:00
Alberto Gonzalez
8cd60be654
qbfsat: Clean up and refactor data structures into `qbfsat.h`.
2020-07-01 19:55:16 +00:00
clairexen
b1707407a0
Merge pull request #2138 from boqwxp/qbfsat-oflag
...
qbfsat: Add `-O[012]` options to control pre-solving simplification with ABC
2020-07-01 16:35:27 +02:00
clairexen
2b0f6e24e2
Merge pull request #2206 from boqwxp/qbfsat-fix-name-specialization
...
qbfsat: Fix name-based hole specialization
2020-07-01 16:34:32 +02:00
Marcelina Kościelnicka
e3564b4502
Add dfflegalize pass.
2020-07-01 01:57:15 +02:00
Marcelina Kościelnicka
7c91f13f51
fmcombine: use the master ff cell type list
2020-06-30 21:07:17 +02:00
Marcelina Kościelnicka
77b15dd8e9
opt_merge: use the master FF type list
2020-06-30 20:57:35 +02:00
clairexen
3fb5b4fd8a
Merge pull request #2199 from YosysHQ/mmicko/sim_memory
...
sim - error when memrd and memwr detected
2020-06-30 17:12:51 +02:00
clairexen
275cee71f6
Merge pull request #2201 from YosysHQ/fix_test_cell_ilang
...
Use ID macro to fix assertion
2020-06-30 17:11:13 +02:00
Alberto Gonzalez
83c595aaac
qbfsat: Add `-O[012]` options to control pre-solving simplification with ABC.
...
Thanks to @mwk for the gate mapping part of the ABC scripts.
Co-Authored-By: Marcelina Kościelnicka <mwk@0x04.net>
2020-06-30 06:44:17 +00:00
Alberto Gonzalez
f544a2cc84
qbfsat: Fix name-based hole specialization.
...
Look for unique connections in the containing module with the $anyconst port Y SigBit on the RHS and use those. If no such connection is found, fall back to using the name of the $anyconst port Y SigBit.
2020-06-30 01:53:21 +00:00
whitequark
a97c13f0ca
techmap: don't drop attributes on replaced cells.
...
This was introduced in 76c4ee4ea5
.
Fixes #2204 .
2020-06-29 23:14:13 +00:00
Miodrag Milanović
4160acc0b1
Merge pull request #2200 from YosysHQ/mmicko/fix_expose
...
expose pass fix
2020-06-29 15:16:29 +02:00
Miodrag Milanovic
405b4e97a1
Give error that options are exclusive
2020-06-29 14:45:49 +02:00
Miodrag Milanovic
0545a042f3
cleanup
2020-06-29 14:42:48 +02:00
Miodrag Milanovic
5aae936044
Use ID macro to fix assertion
2020-06-29 13:18:13 +02:00
Miodrag Milanovic
87717d67d1
expose pass fix
2020-06-29 11:56:43 +02:00
Miodrag Milanovic
48b6d3272c
sim - error when memrd and memwr detected
2020-06-29 10:33:39 +02:00
Xiretza
e2cfe57edd
test_cell: don't generate directional shifts with \B_SIGNED=1
...
This was made an explicit error in e97e33d
, "kernel: require \B_SIGNED=0
on $shl, $sshl, $shr, $sshr.".
2020-06-28 21:30:16 +02:00
clairexen
c7d71f436d
Merge pull request #2168 from whitequark/assert-unused-exprs
...
Use (and ignore) the expression provided to log_assert in NDEBUG builds
2020-06-25 18:21:51 +02:00
clairexen
21209d632e
Merge pull request #2135 from boqwxp/qbfsat-timeinfo
...
log and qbfsat: Also include child process usage in `PerformanceTimer::query()` and report the time for each call to the QBF-SAT solver
2020-06-25 18:18:09 +02:00
clairexen
fb6441731a
Merge pull request #2093 from boqwxp/qbfsat-bugfixes
...
qbfsat: Multiple bugfixes
2020-06-25 18:14:17 +02:00
Marcelina Kościelnicka
8f12c5b063
simplemap: Fix $dffsre mapping.
2020-06-23 23:16:43 +02:00
Marcelina Kościelnicka
88e7f90663
Update dff2dffe, dff2dffs, zinit to new FF types.
2020-06-23 18:24:53 +02:00
Marcelina Kościelnicka
832acc8648
Add new FF types to simplemap.
2020-06-23 15:40:02 +02:00
Marcelina Kościelnicka
119f79d8b9
Add support for new FF types in some opt passes.
2020-06-23 15:40:02 +02:00
Marcelina Kościelnicka
b0bee396a8
Add new builtin FF types
...
The new types include:
- FFs with async reset and enable (`$adffe`, `$_DFFE_[NP][NP][01][NP]_`)
- FFs with sync reset (`$sdff`, `$_SDFF_[NP][NP][01]_`)
- FFs with sync reset and enable, reset priority (`$sdffs`, `$_SDFFE_[NP][NP][01][NP]_`)
- FFs with sync reset and enable, enable priority (`$sdffce`, `$_SDFFCE_[NP][NP][01][NP]_`)
- FFs with async reset, set, and enable (`$dffsre`, `$_DFFSRE_[NP][NP][NP][NP]_`)
- latches with reset or set (`$adlatch`, `$_DLATCH_[NP][NP][01]_`)
The new FF types are not actually used anywhere yet (this is left
for future commits).
2020-06-23 15:40:02 +02:00
Alberto Gonzalez
a564cc806f
log, qbfsat: Include child process time in `PerformanceTimer::query()` and report the time for each call to the QBF-SAT solver.
2020-06-21 02:16:52 +00:00
Alberto Gonzalez
62a9e62a1b
qbfsat: Simplify solution recovery parsing and tweak the solution regexes.
2020-06-21 02:16:11 +00:00
Alberto Gonzalez
e1fedf054e
qbfsat: Avoid instantiating `AttrObject`s directly.
...
Co-Authored-By: Claire Wolf <claire@symbioticeda.com>
2020-06-21 02:16:11 +00:00
Alberto Gonzalez
08cede4669
qbfsat: Simplify solution format and replace `SigBit::str()` with `log_signal()`.
...
Co-Authored-By: Claire Wolf <claire@symbioticeda.com>
2020-06-21 02:16:11 +00:00
Alberto Gonzalez
4ab41c6435
qbfsat: Fixes three bugs.
...
1. Infinite loop in the optimization procedure when the first solution found while maximizing is at zero.
2. A signed-ness issue when maximizing.
3. Erroneously entering bisection mode with no wire to optimize.
2020-06-21 02:16:11 +00:00
Alberto Gonzalez
a3d1f8637a
qbfsat: Use bit precise mapping for hole value wires and a more robust hole spec for writing to and specializing from a solution file.
2020-06-21 02:16:11 +00:00
whitequark
c8c3c7af87
Use [[maybe_unused]] instead of YS_ATTRIBUTE(unused).
...
[[maybe_unused]] is available since C++17, so this commit adds
a polyfill YS_MAYBE_UNUSED. Once we require C++17 we can drop it.
2020-06-19 15:48:58 +00:00
whitequark
118e4caa37
Remove YS_ATTRIBUTE(unused) where present just for log_assert()/log_debug().
2020-06-19 15:48:58 +00:00
whitequark
ede4b10da8
Merge pull request #2173 from whitequark/use-cxx11-final-override
...
Use C++11 final/override/[[noreturn]]
2020-06-19 06:15:33 +00:00
whitequark
7191dd16f9
Use C++11 final/override keywords.
2020-06-18 23:34:52 +00:00
Alberto Gonzalez
76dfa81790
cutpoint: Improve efficiency by iterating over module ports instead of module wires.
2020-06-18 17:42:36 +00:00
N. Engelhardt
dfde1cf1c5
Merge pull request #2153 from boqwxp/splitnets-cleanup
...
splitnets: Cleanup and efficiency improvements
2020-06-18 19:16:55 +02:00
whitequark
5439faebf9
Merge pull request #2142 from whitequark/splitnets-hdlname
...
splitnets: propagate (*hdlname*) and disambiguate via start_offset
2020-06-18 16:57:24 +00:00
Anonymous Maarten
60fb9cabcf
msvc does not support designated initializers in structs
2020-06-17 16:20:52 +02:00
Alberto Gonzalez
f5d7cd60f5
splitnets: Clean up pseudo-private member usage
2020-06-13 05:47:55 +00:00
Alberto Gonzalez
b70de98bd1
splitnets: Slightly improve efficiency by avoiding some unnecessary lookups
2020-06-13 05:26:30 +00:00
whitequark
2139a5c21a
splitnets: propagate (*hdlname*) and disambiguate via start_offset.
...
This allows reliably coalescing the split wires later.
2020-06-10 19:59:08 +00:00
Claire Wolf
0bd70e8222
Drive-by modernization in sat.cc
...
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-06-09 22:48:26 +02:00
Claire Wolf
3c7122c378
Do not optimize away FFs in "prep" and Verific fron-end
...
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-06-09 15:54:14 +02:00
whitequark
98e1080345
flatten: accept processes.
2020-06-09 09:56:23 +00:00
whitequark
fbb346ea91
flatten: preserve original object names via hdlname attribute.
2020-06-08 20:19:41 +00:00
whitequark
8d821dbbdb
flatten: only prepend $flatten once per wire.
2020-06-08 20:19:41 +00:00
whitequark
a1814b732f
flatten: make hygienic.
...
Before this commit, `flatten` matched the template objects with
the newly created objects solely by their name. Because of this,
it could be confused by code such as:
module bar();
$dff a();
endmodule
module foo();
bar b();
$dff \b.a ();
endmodule
After this commit, `flatten` avoids every possible case of name
collision.
Fixes #2106 .
2020-06-08 19:30:21 +00:00
clairexen
369dcb4e82
Merge pull request #2085 from rswarbrick/select
...
Silence warning in select.cc and pass some more args by ref
2020-06-08 15:55:52 +02:00
clairexen
0f209378a8
Merge pull request #2089 from rswarbrick/modports
...
Simplify a modport check in hierarchy.cc
2020-06-08 15:48:11 +02:00
clairexen
fbd0d8d5f0
Merge pull request #2105 from whitequark/split-flatten-off-techmap
...
Split `flatten` from `techmap` and simplify it
2020-06-08 15:27:15 +02:00
Marcelina Kościelnicka
28b9f49c94
fsm_extract: avoid calling log_signal to determine wire name
...
log_signal can result in a string with spaces (when bit selection is
involved), which breaks the rule of IdString not containing whitespace.
Instead, remove the sigspec from the name entirely — given that the
resulting wire will have no users, it will be removed later anyway,
so its name doesn't really matter.
Fixes #2118
2020-06-08 03:49:58 +02:00
Eddie Hung
69850204c4
Merge pull request #2077 from YosysHQ/eddie/abc9_dff_improve
...
abc9: -dff improvements
2020-06-04 08:15:25 -07:00
whitequark
5a5a9b4ffe
flatten: clean up log messages.
2020-06-04 12:22:59 +00:00
whitequark
d731fe054b
flatten: topologically sort modules.
2020-06-04 12:22:59 +00:00
Eddie Hung
45cd323055
Merge pull request #2082 from YosysHQ/eddie/abc9_scc_fixes
...
abc9: fixes around handling combinatorial loops
2020-06-03 17:35:46 -07:00
whitequark
6268bdfe6f
flatten: simplify.
...
`flatten` cannot derive modules in most cases because that would just
yield processes, and it does not support `-autoproc`; in practice
`flatten` has to be preceded by a call to `hierarchy`, which makes
deriving unnecessary.
2020-06-04 00:02:12 +00:00
whitequark
d3e2100306
flatten: simplify. NFC.
...
Remove redundant sigmaps.
2020-06-04 00:02:12 +00:00
whitequark
66255dab4e
flatten: simplify.
...
Flattening does not benefit from topologically sorting cells within
a module when processing them.
2020-06-04 00:02:12 +00:00
whitequark
5d2b6d1394
flatten: simplify. NFC.
...
Flatten is non-recursive and doesn't need to keep track of handled
cells.
2020-06-04 00:02:12 +00:00
whitequark
3c3fa774e5
flatten: simplify. NFC.
...
Flattening always does "non-recursive" mapping.
2020-06-04 00:02:12 +00:00
whitequark
e561a3a76f
flatten: simplify. NFC.
...
The `celltypeMap` always maps `x` to `{x}`.
2020-06-04 00:02:12 +00:00
whitequark
6783876807
flatten: simplify. NFC.
...
The `design` and `map` designs are always the same when flattening.
2020-06-04 00:02:12 +00:00
whitequark
9338ff66b9
RTLIL: factor out RTLIL::Module::addMemory. NFC.
2020-06-04 00:02:12 +00:00