riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
13,788 Commits 114 Branches 50 Tags 55 MiB
Commit Graph

6 Commits

Author SHA1 Message Date
Roland Coeurjoly 39bf4f04f7 Create VCD file from SMT file 2024-08-21 11:02:31 +01:00
Roland Coeurjoly b98210d8ac Valid SMT is emitted, improved test script 2024-08-21 11:02:31 +01:00
Roland Coeurjoly 71aaa1c80d Consolidate tests scripts into one 2024-08-21 11:02:31 +01:00
Roland Coeurjoly 547c5466ec Ignore smt2 files, generated by the execution of the tests 2024-08-21 11:02:31 +01:00
Roland Coeurjoly 54225b5c42 Add test for SMT backend. Tests if SMT is valid and compares simulation with yosys sim 2024-08-21 11:02:31 +01:00
Roland Coeurjoly 720429b1fd Add test_cell tests for C++ functional backend 2024-08-21 11:01:09 +01:00