Marcelina Kościelnicka
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2dcb0797f0
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machxo2: Use `memory_libmap` pass.
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2022-05-18 17:32:56 +02:00 |
Marcelina Kościelnicka
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15b0d717ed
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iopadmap: Add native support for negative-polarity output enable.
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2021-11-09 15:40:16 +01:00 |
gatecat
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cae905f551
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Blackbox all whiteboxes after synthesis
This prevents issues like processes in whiteboxes triggering an error in
the JSON backend.
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-03-17 21:07:20 +00:00 |
William D. Jones
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ae07298a6b
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machxo2: Switch to LUT4 sim model which propagates less undefined/don't care values.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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8f1a350f5e
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machxo2: Add experimental status to help.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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e3974809ec
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machxo2: Add DCCA and DCMA blackbox primitives.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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a1ea1430b6
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machxo2: Fix reversed interpretation of REG_SD config bits.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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4e9def23de
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machxo2: Tristate is active-low.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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8b14152506
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machxo2: Fix typos in FACADE_FF sim model.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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8348c45e4f
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machxo2: Fix naming of TRELLIS_IO ports to match PIO pins in routing graph.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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120404bfda
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machxo2: Improve help_mode output in synth_machxo2.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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3674eb34d4
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machxo2: Use attrmvcp pass to move LOC and src attributes from ports/wires to IO cells.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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124780ecd9
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machxo2: Add missing OSCH oscillator primitive.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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597a54dbd0
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machxo2: Add -noiopad option to synth_machxo2.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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3697f351d5
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machxo2: Use correct INITVAL for LUT1 in FACADE_SLICE.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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f07b8eb606
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machxo2: Fix cells_sim typo where OFX1 was multiply-driven.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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c76f361b56
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machxo2: synth_machxo2 now maps ports to FACADE_IO.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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03cbf1327d
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machxo2: Add initial value for Q in FACADE_FF.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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0364ded385
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machxo2: Add FACADE_IO simulation model. More comments on models.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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1b703d3f03
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machxo2: Add FACADE_SLICE simulation model.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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cc52eb53cd
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machxo2: Improve FACADE_FF simulation model.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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427fed23ee
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machxo2: Improve LUT4 techmap. Use same output port name for LUT4 as Lattice.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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84937e9689
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machxo2: Add dff.ys test, fix another cells_map.v typo.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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044393b990
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machxo2: Fix more oversights in machxo2 models. logic.ys test passes.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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b87f6a0906
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machxo2: Fix typos. test/arch/run-test.sh passes.
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2021-02-23 17:39:58 +01:00 |
William D. Jones
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88c8f81260
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machxo2: Create basic techlibs and synth_machxo2 pass.
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2021-02-23 17:39:58 +01:00 |