yosys

Commit Graph

Author	SHA1	Message	Date
SergeyDegtyar	aad9bad326	Add tests for macc and rom; Test cases from https://www.latticesemi.com/-/media/LatticeSemi/Documents/UserManuals/EI/iCEcube201701UserGuide.ashx?document_id=52071; In both cases synthesized only LUTs and DFFs.	2019-08-27 13:56:26 +03:00
SergeyDegtyar	c29380b381	Fix pull request	2019-08-23 18:55:01 +03:00
SergeyDegtyar	3c10f58d04	Fix run-test.sh; Add new test for dpram.	2019-08-23 17:00:16 +03:00
SergeyDegtyar	0b25dbf1c6	Fix path in run-test.sh	2019-08-23 12:40:14 +03:00
Eddie Hung	36cf0a3dd5	Remove adffs_tb.v	2019-08-22 16:50:14 -07:00
Eddie Hung	698a0e3aaf	WIP for equivalency checking memories	2019-08-22 16:05:12 -07:00
Eddie Hung	43e7c4917a	Do not print OKAY	2019-08-22 16:05:12 -07:00
Eddie Hung	5061d239ae	Fail if iverilog fails	2019-08-22 16:05:12 -07:00
Eddie Hung	8e3754bdb4	Hide tri-state warning message for now	2019-08-22 16:05:12 -07:00
Eddie Hung	659a481482	Remove unused output	2019-08-22 16:05:12 -07:00
Eddie Hung	61087329ef	Fix tribuf test	2019-08-22 16:05:12 -07:00
Eddie Hung	f9906eed68	Fix comments	2019-08-22 16:05:12 -07:00
Eddie Hung	9224b3bc17	Remove tech independent synthesis	2019-08-22 16:05:12 -07:00
Eddie Hung	388eb3288c	Remove dffe instantation	2019-08-22 16:04:50 -07:00
Eddie Hung	9e537a76b5	Move $dffe to dffs.{v,ys}	2019-08-22 16:04:48 -07:00
Eddie Hung	c5754d9e8b	Make multiplier wider, do not do tech independent synth	2019-08-22 16:04:07 -07:00
SergeyDegtyar	d945b8a357	Fix all comments from PR	2019-08-21 21:52:07 +03:00
SergeyDegtyar	b835ec37cb	Add temp directory	2019-08-21 07:53:34 +03:00
SergeyDegtyar	71dd412ac5	Fix tests; Remove simulation; - Add -map and -assert options for equiv_opt; !!! '-assert' option was commented for the next tests (unproven $equiv cells was found): - dffs; - div_mod; - latches; - mul_pow; - Add design -load; - Remove simulations;	2019-08-20 15:52:25 +03:00
SergeyDegtyar	153ec0541c	Add new tests for ice40 architecture	2019-08-20 07:50:05 +03:00

20 Commits