Eddie Hung
f1a8e8a480
Merge remote-tracking branch 'origin/master' into xc7srl
2019-03-14 08:59:19 -07:00
Clifford Wolf
53b28b3f01
Merge pull request #869 from cr1901/win-shell
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Install launcher executable when running yosys-smtbmc on Windows.
2019-03-14 16:43:23 +01:00
Eddie Hung
26ecbc1aee
Add shregmap -init_msb_first and use in synth_xilinx
2019-03-14 08:10:02 -07:00
Eddie Hung
79b4a275ce
Fix cells_map for SRL
2019-03-14 08:09:48 -07:00
Eddie Hung
edca2f1163
Move shregmap until after first techmap
2019-03-13 17:13:52 -07:00
Eddie Hung
24f129ddfb
Refactor $__SHREG__ in cells_map.v
2019-03-13 16:17:54 -07:00
William D. Jones
ff15cf9b1f
Install launcher executable when running yosys-smtbmc on Windows.
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Signed-off-by: William D. Jones <thor0505@comcast.net>
2019-03-13 13:49:16 -04:00
Clifford Wolf
f0b2d8e467
Merge pull request #868 from YosysHQ/clifford/fixmem
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Various mem2reg-related improvements in handling of memories
2019-03-13 13:40:30 +01:00
Clifford Wolf
1cd04a6838
Fix a bug in handling quotes in multi-cmd lines in Yosys scripts
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-12 21:15:11 +01:00
Clifford Wolf
ac10f72e49
Merge pull request #866 from YosysHQ/clifford/idstuff
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Improve determinism of IdString DB for similar scripts
2019-03-12 20:27:36 +01:00
Clifford Wolf
9284cf92b8
Remove ice40/cells_sim.v hack to avoid warning for blocking memory writes
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-12 20:14:18 +01:00
Clifford Wolf
d25a0c8ade
Improve handling of memories used in mem index expressions on LHS of an assignment
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-12 20:12:02 +01:00
Clifford Wolf
a4ddc569b4
Remove outdated "blocking assignment to memory" warning
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-12 20:10:55 +01:00
Clifford Wolf
ab5b50ae3c
Only set MEM2REG_FL_CONST_LHS/MEM2REG_FL_VAR_LHS for non-init writes, fixes #867
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-12 20:09:47 +01:00
Clifford Wolf
20c6a8c9b0
Improve determinism of IdString DB for similar scripts
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-11 20:12:28 +01:00
Eddie Hung
ef48b62cb1
Merge pull request #864 from YosysHQ/svalabelfix
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Fix handling of cases that look like sva labels, fixes #862
2019-03-11 11:58:07 -07:00
Clifford Wolf
d9bb5f3637
Add ENABLE_GLOB Makefile switch
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-11 01:08:36 -07:00
Clifford Wolf
b02d9c2634
Fix handling of cases that look like sva labels, fixes #862
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-10 16:27:18 -07:00
Clifford Wolf
ff4c2a14ae
Fix typo in ice40_braminit help msg
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-09 13:24:55 -08:00
Clifford Wolf
2ace1b0041
Merge pull request #859 from smunaut/ice40_braminit
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iCE40 BRAM primitives init from file
2019-03-09 13:24:10 -08:00
Clifford Wolf
94f995ee37
Fix signed $shift/$shiftx handling in write_smt2
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-09 13:19:41 -08:00
Clifford Wolf
399ab16315
Add $dffsr support to async2sync
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-09 11:52:00 -08:00
Clifford Wolf
cebd21aa96
Merge pull request #858 from YosysHQ/clifford/svalabels
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Add support for using SVA labels in yosys-smtbmc console output
2019-03-09 11:14:57 -08:00
Clifford Wolf
7504d4d345
Merge pull request #861 from YosysHQ/verific_chparam
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Add -chparam option to verific command
2019-03-08 23:02:56 -08:00
Clifford Wolf
e7a34d342e
Also add support for labels on sva module items, fixes #699
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-08 22:55:09 -08:00
Eddie Hung
ee013fba54
Update help message for -chparam
2019-03-09 01:56:16 +00:00
Eddie Hung
2aa3903757
Add -chparam option to verific command
2019-03-09 01:54:01 +00:00
Eddie Hung
1dc060f32e
Fix spelling
2019-03-09 00:43:50 +00:00
Clifford Wolf
e9b34ad5c0
Merge branch 'master' of github.com:YosysHQ/yosys
2019-03-07 22:44:50 -08:00
Clifford Wolf
a330c68363
Fix handling of task output ports in clocked always blocks, fixes #857
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-07 22:44:37 -08:00
Sylvain Munaut
5b6f591033
ice40: Run ice40_braminit pass by default
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Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2019-03-08 00:15:46 +01:00
Sylvain Munaut
e71055cfe8
ice40: Add ice40_braminit pass to allow initialization of BRAM from file
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This adds a INIT_FILE attribute to the SB_RAM40_4K blocks that will
initialize content from a hex file. Same behavior is imlemented in the
simulation model and in a new pass for actual synthesis
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2019-03-08 00:15:46 +01:00
Clifford Wolf
df0598f455
Merge pull request #856 from kprasadvnsi/master
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examples/anlogic/ now also output the SVF file.
2019-03-07 11:34:12 -08:00
Clifford Wolf
5dfc7becca
Use SVA label in smt export if available
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-07 11:31:46 -08:00
Clifford Wolf
22ff60850e
Add support for SVA labels in read_verilog
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-07 11:17:32 -08:00
Clifford Wolf
cda37830b0
Add hack for handling SVA labels via Verific
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-07 10:52:44 -08:00
Clifford Wolf
350dfd3745
Add link to SF2 / igloo2 macro library guide
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-07 09:08:26 -08:00
Clifford Wolf
8b0719d1e3
Improvements in sf2 cells_sim.v
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-06 16:18:49 -08:00
Clifford Wolf
2d2c1617ee
Add sf2 techmap rules for more FF types
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-06 15:47:54 -08:00
Clifford Wolf
78762316aa
Refactor SF2 iobuf insertion, Add clkint insertion
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-06 00:41:02 -08:00
Clifford Wolf
b1b9edf5cc
Improve igloo2 example
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-05 20:47:07 -08:00
Clifford Wolf
e22afeae90
Improve igloo2 example
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-05 20:36:00 -08:00
Clifford Wolf
da5181a3df
Improvements in SF2 flow and demo
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-05 20:36:00 -08:00
Kali Prasad
7c03b0b082
examples/anlogic/ now also output the SVF file.
2019-03-06 09:51:11 +05:30
Eddie Hung
d03780c3f4
Fix spelling in pmgen/README.md
2019-03-05 17:55:29 -08:00
Clifford Wolf
24d1b92eda
Improve igloo2 exmaple
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-05 17:27:58 -08:00
Clifford Wolf
bfcd46dbd3
Merge pull request #842 from litghost/merge_upstream
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Changes required for VPR place and route in synth_xilinx
2019-03-05 15:33:19 -08:00
Clifford Wolf
724576a4e2
Merge pull request #850 from daveshah1/ecp5_warn_conflict
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ecp5: Demote conflicting FF init values to a warning
2019-03-05 15:23:01 -08:00
Clifford Wolf
3ef427f4a9
Add missing newline
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-05 15:21:04 -08:00
Clifford Wolf
ba0da6371e
Merge pull request #851 from kprasadvnsi/master
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Added examples/anlogic/
2019-03-05 15:20:03 -08:00