yosys

Commit Graph

Author	SHA1	Message	Date
Clifford Wolf	ec923652e2	Refactoring {SigSpec\|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3	2014-07-23 09:52:55 +02:00
Clifford Wolf	a8d3a68971	Refactoring {SigSpec\|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3	2014-07-23 09:49:43 +02:00
Clifford Wolf	7bffde6abd	SigSpec refactoring: change RTLIL::SigSpec::size() to be read-only	2014-07-22 20:39:38 +02:00
Clifford Wolf	4b4048bc5f	SigSpec refactoring: using the accessor functions everywhere	2014-07-22 20:39:37 +02:00
Clifford Wolf	a233762a81	SigSpec refactoring: renamed chunks and width to __chunks and __width	2014-07-22 20:39:37 +02:00
Clifford Wolf	3b5f4ff39c	Fixed ilang parsing of process attributes	2014-07-22 20:39:37 +02:00
Clifford Wolf	4147b55c23	Added "autoidx" statement to ilang file format	2014-07-21 15:15:18 +02:00
Clifford Wolf	a1be4816d6	Replaced depricated %name-prefix= bison directive	2014-04-20 14:22:11 +02:00
Clifford Wolf	0defc86519	renamed ilang "scope error" to "ilang error"	2014-02-11 19:17:07 +01:00
Clifford Wolf	fb186e6299	Improved ilang parser error messages	2014-02-09 15:35:31 +01:00
Clifford Wolf	af325bf206	Fixed comment/eol parsing in ilang frontend	2014-02-01 17:28:02 +01:00
Clifford Wolf	f4b46ed31e	Replaced signed_parameters API with CONST_FLAG_SIGNED	2013-12-04 14:24:44 +01:00
Clifford Wolf	0ef22c7609	Added support for signed parameters in ilang	2013-11-24 17:37:27 +01:00
Clifford Wolf	f71e27dbf1	Remove auto_wire framework (smarter than the verilog standard)	2013-11-24 17:29:11 +01:00
Clifford Wolf	09471846c5	Major improvements in mem2reg and added "init" sync rules	2013-11-21 13:49:00 +01:00
Clifford Wolf	08ceb3729e	Fixed ilang parser: memory width	2013-11-20 19:55:52 +01:00
Clifford Wolf	375f83c5ec	Fixed memory leak in ilang frontend	2013-05-23 12:55:59 +02:00
Clifford Wolf	7764d0ba1d	initial import	2013-01-05 11:13:26 +01:00

18 Commits