ff10aeebd6
Fix some synth_* help messages
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Mostly memory_libmap arg checks; puts the checks into an else block on the `if (help_mode)` check to avoid cases like `synth_ice40` listing `-no-auto-huge [-no-auto-huge]`.
Also fix `map_iopad` section being empty in `synth_fabulous`.
2024-03-18 11:33:18 +13:00
bf955cc2b0
nexus: Fix format strings to remove space padding
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Signed-off-by: gatecat <gatecat@ds0.me>
2023-12-03 10:36:34 +01:00
7bac1920b2
nexus: Fix BRAM write enable in PDP mode
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Signed-off-by: gatecat <gatecat@ds0.me>
2023-01-04 17:59:36 +01:00
8fab6ec023
nexus: Fix BRAM mapping.
2022-08-09 23:47:55 +02:00
0a8eaca322
nexus: Use `memory_libmap` pass.
2022-05-18 17:32:56 +02:00
958c3a46ad
nexus: Fix arith_map CO signal.
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Fixes #3187 .
2022-02-06 13:05:30 +01:00
f699c4ba58
nexus: Fix BB sim model
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Signed-off-by: gatecat <gatecat@ds0.me>
2022-01-19 18:14:24 +00:00
15b0d717ed
iopadmap: Add native support for negative-polarity output enable.
2021-11-09 15:40:16 +01:00
c2d358484f
Gowin: deal with active-low tristate ( #2971 )
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* deal with active-low tristate
* remove empty port
* update sim models
* add expected lut1 to tests
2021-08-20 21:21:06 +02:00
0ada13cbe2
Use HTTPS for website links, gatecat email
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git ls-tree -r --name-only HEAD | xargs sed -i -rf ~/fixemails.sed
s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+(Shah|gatecat)\s+<(dave|david|gatecat)@(symbioticeda.com|yosyshq.com|ds0.me)>/gatecat <gatecat@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/|http://yosyshq.net/yosys/,https://yosyshq.net/yosys/,g ;
2021-06-09 12:16:56 +02:00
72787f52fc
Fixing old e-mail addresses and deadnames
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s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g ;
2021-06-08 00:39:36 +02:00
cae905f551
Blackbox all whiteboxes after synthesis
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This prevents issues like processes in whiteboxes triggering an error in
the JSON backend.
Signed-off-by: gatecat <gatecat@ds0.me>
2021-03-17 21:07:20 +00:00
f5cc1224f9
nexus: Add MULTADDSUB9X9WIDE sim model
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Signed-off-by: David Shah <dave@ds0.me>
2020-12-08 15:49:20 +00:00
17812a1560
nexus: Add LRAM inference
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Signed-off-by: David Shah <dave@ds0.me>
2020-12-07 13:27:17 +00:00
264e924abb
nexus: More efficient CO mapping
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Signed-off-by: David Shah <dave@ds0.me>
2020-12-02 17:08:39 +00:00
9f241c9a42
nexus: DSP inference support
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-20 08:45:55 +00:00
923843b3fa
nexus: Add DSP simulation model
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-18 10:21:17 +00:00
6d63e58e46
nexus: Add make_transp to BRAMs
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Signed-off-by: David Shah <dave@ds0.me>
2020-10-22 15:11:59 +01:00
4d584d9319
synth_nexus: Initial implementation
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Signed-off-by: David Shah <dave@ds0.me>
2020-10-15 08:52:15 +01:00
Krystine Sherwin
gatecat
Marcelina Kościelnicka
Pepijn de Vos
Claire Xenia Wolf
David Shah