6 Commits

Author	SHA1	Message	Date
Miodrag Milanovic	4792d925fc	Update CHANGELOG and CODEOWNERS	2021-12-01 08:42:37 +01:00
Miodrag Milanović	cd71d260ea	Update CODEOWNERS	2021-11-08 16:59:45 +01:00
Eddie Hung	55dc5a4e4f	abc9: fix SCC issues (#2694) ... * xilinx: add SCC test for DSP48E1 * xilinx: Gate DSP48E1 being a whitebox behind ALLOW_WHITEBOX_DSP48E1 Have a test that checks it works through ABC9 when enabled * abc9 to break SCCs using $__ABC9_SCC_BREAKER module * Add test * abc9_ops: remove refs to (* abc9_keep *) on wires * abc9_ops: do not bypass cells in an SCC * Add myself to CODEOWNERS for abc9* * Fix compile * abc9_ops: run -prep_hier before scc * Fix tests * Remove bug reference pending fix * abc9: fix for -prep_hier -dff * xaiger: restore PI handling * abc9_ops: -prep_xaiger sigmap * abc9_ops: -mark_scc -> -break_scc * abc9: eliminate hard-coded abc9.box from tests Also tidy up * Address review	2021-03-29 22:01:57 -07:00
whitequark	cb2283389d	CODEOWNERS: add @zachjs as Verilog/AST frontend owner	2020-12-27 05:00:04 +00:00
Alberto Gonzalez	8cd60be654	qbfsat: Clean up and refactor data structures into `qbfsat.h`.	2020-07-01 19:55:16 +00:00
N. Engelhardt	d8d8deeaf4	Add codeowners file (#2098)	2020-06-04 18:20:08 +02:00