riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
10,171 Commits 81 Branches 48 Tags 63 MiB
Commit Graph

5 Commits

Author SHA1 Message Date
Miodrag Milanovic cd5c177739 Remove executable flag from files 2020-02-15 10:36:44 +01:00
Larry Doolittle e2fc18f27b Reduce amount of trailing whitespace in code base 2019-02-28 14:58:11 -08:00
Miodrag Milanovic 50ef4561d4 Fix cells_sim.v for Achronix FPGA 2019-01-04 15:15:23 +01:00
c60k28 efed2420d6 Fixed broken Quartus backend on dffeas init value (Error (12170): Illegal value for the POWER_UP parameter. Fixed and tested Cyclone V device 2018-03-31 22:48:47 -06:00
dh73 1fc061d90c Organizing Speedster file names 2017-11-08 20:23:55 -06:00