yosys

Author	SHA1	Message	Date
Emil J. Tywoniak	785bd44da7	rtlil: represent Const strings as std::string	2024-10-14 06:28:12 +02:00
Emily Schmidt	dd5ec84a26	fix bugs in drivertools	2024-08-21 11:01:09 +01:00
Jannis Harder	d90268f610	fixup! drivertools: Utility code for indexing and traversing signal drivers	2024-08-21 11:01:09 +01:00
Jannis Harder	56572978f5	drivertools: Utility code for indexing and traversing signal drivers It adds `DriveBit`, `DriveChunk` and `DriveSpec` types which are similar to `SigBit`, `SigChunk` and `SigSpec` but can also directly represent cell ports, undriven bits and multiple drivers. For indexing an RTLIL module and for querying signal drivers it comes with a `DriverMap` type which is somewhat similar to a `SigMap` but is guaranteed to produce signal drivers as returned representatives. A `DriverMap` can also optionally preserve connections via intermediate wires (e.g. querying the driver of a cell input port will return a connected intermediate wire, querying the driver of that wire will return the cell output port that's driving the wire).	2024-08-21 11:00:21 +01:00