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14433 Commits

Author SHA1 Message Date
Martin Povišer e82e5f8b13 rtlil: Adjust internal check for `$mem_v2` cells 
There's a mismatch between what `kernel/mem.cc` emits for memories
with no read ports and what the internal RTLIL check expects.

The point of dispute it whether some of the parameters relating to read
ports have a zero-width value in this case. The `mem.cc` code says no,
the internal checker says yes.

Surveying the other `$mem_v2` parameters, and internal cell parameters
in general, I am inclined to side with the `mem.cc` code.

This breaks RTLIL compatibility but for an obscure edge case.
 2024-11-08 15:18:43 +01:00
Miodrag Milanovic df391f5816 verific: fix blackbox regression and add test case 2024-11-08 14:57:04 +01:00
github-actions[bot] cef87cc179 Bump version 2024-11-08 00:20:23 +00:00
KrystalDelusion 4343c791cb
Merge pull request #4704 from YosysHQ/krys/drop_ilang 
Remove references to ilang
 2024-11-08 11:28:06 +13:00
KrystalDelusion 3c30a9a108
Merge pull request #4543 from YosysHQ/update_fst 
libs/fst: Update from upstream
 2024-11-08 05:36:25 +13:00
Martin Povišer 5c1889634d
Merge pull request #4720 from georgerennie/george/bufnorm_constants 
bufnorm: preserve constant bits driving wires
 2024-11-07 13:56:53 +01:00
George Rennie a31c968340 tests/bufnorm: add test for bufnorm of constant 2024-11-07 12:55:50 +01:00
George Rennie 8f6058a7d6 bufnorm: preserve constant bits driving wires 2024-11-07 11:48:48 +01:00
AdamLee7 7ed359fa7b add select option for write_json 2024-11-07 17:48:06 +08:00
Henner Zeller 285fd5b83a Include cstdlib for free() 2024-11-06 17:35:00 -08:00
George Rennie c23e64a236 tests/proc: add proc_dff bug 4712 as testcase 2024-11-07 00:10:17 +01:00
George Rennie 626dbbe1e0 proc_dff: fix early return bug 
* early return caused proc_dff to stop considering rules after seeing
  one async rule - this is because continue should have been used to
  continue to procecssing the next rule instead of returning from the
  function
 2024-11-07 00:06:03 +01:00
N. Engelhardt 2de9f00368
Merge pull request #4620 from RCoeurjoly/fix-vcd-parsing-ghdl-var-spacing 2024-11-06 16:29:07 +01:00
N. Engelhardt 9068ec5566
Merge pull request #4627 from RCoeurjoly/roland/assume_x 2024-11-06 16:27:30 +01:00
Emil J. Tywoniak 387a235158 functional, glift: use fold overload of IdString::in instead of pool literals 2024-11-06 12:48:32 +01:00
github-actions[bot] 2de24dc1c2 Bump version 2024-11-06 00:20:20 +00:00
Martin Povišer 29af057430
Merge pull request #4707 from povik/stat-unused 
stat: Drop unused field
 2024-11-05 09:38:29 +01:00
Martin Povišer 4df3a5d7ec stat: Drop unused field 2024-11-05 09:37:35 +01:00
Miodrag Milanovic 0dd1e43dff Next dev cycle 2024-11-05 08:23:13 +01:00
Miodrag Milanovic 647d61dd92 Release version 0.47 2024-11-05 07:59:25 +01:00
Krystine Sherwin e4994554fd
Docs: Fix nested list 2024-11-05 13:48:48 +13:00
Krystine Sherwin f2517f7599
README: Add note on linting 2024-11-05 13:42:16 +13:00
Krystine Sherwin b14a651142
Docs: Mention verilator for linting 
Link to verilator in the introduction.
Include `verilator --lint-only fifo.v` in the example synth doc.
Fix linter warnings in fifo.v.
 2024-11-05 13:29:45 +13:00
github-actions[bot] 2999f5589c Bump version 2024-11-05 00:20:31 +00:00
Krystine Sherwin ee73a91f44
Remove references to ilang 2024-11-05 12:36:31 +13:00
Lofty 52c231dd64
Merge pull request #4697 from georgerennie/george/zero_width_string 
frontends/ast.cc: special-case zero width strings as "\0"
 2024-11-04 15:40:04 +00:00
Lofty 3250f2b82b
Merge pull request #4700 from povik/select-list-mod 
Add `select -list-mod`
 2024-11-04 15:38:42 +00:00
Lofty 2610ccb8fa
Merge pull request #4702 from povik/cellmatch-derive-luts 
Document `cellmatch -derive_luts` option
 2024-11-04 15:38:04 +00:00
Martin Povišer d752ca4847 Fix test after option change 2024-11-04 16:26:46 +01:00
George Rennie 84ee345071 pyosys: support ObjRange 
* this adds support for cells(), modules() and wires() that all return
  ObjRanges, converting them into lists for python
 2024-11-04 16:00:01 +01:00
Martin Povišer cbe73c9047 cellmatch: Visit whiteboxes for `-derive_luts` 2024-11-04 14:28:46 +01:00
Martin Povišer c9ed6d8dcf cellmatch: Rename `-lut_attrs` to `-derive_luts`; document option 2024-11-04 14:28:40 +01:00
George Rennie de728c9824 pyosys generator: ignore attributes 
* this allows log_error, log_file_error and log_cmd_error which are all
  marked [[noreturn]] to be supported
 2024-11-04 14:08:57 +01:00
Martin Povišer 35a20da512 logger: Adjust print 2024-11-04 13:16:40 +01:00
Martin Povišer 7aa3fdab80 select: Add `-list-mod` option 2024-11-04 13:16:13 +01:00
George Rennie dbfca1bdff frontends/ast.cc: special-case zero width strings as "\0" 
* Fixes #4696
 2024-11-01 17:19:28 +01:00
Emil J b2d78589e2
Merge pull request #4675 from YosysHQ/emil/pyosys-fix-segfault 
yosys: fix pyosys initialization segfault
 2024-11-01 16:40:58 +01:00
github-actions[bot] 8fb73e18ff Bump version 2024-10-29 00:21:12 +00:00
Lofty c07c2166f8
Merge pull request #4684 from YosysHQ/lofty/remove-qwp 
qwp: remove
 2024-10-28 09:20:03 +00:00
Martin Povišer 92fb6e205d
Merge pull request #4685 from povik/aiger2-aoi3-fix 
aiger2: Fix open-coded constants
 2024-10-28 10:15:33 +01:00
Martin Povišer 598f6c9de9 aiger2: Fix open-coded constants 2024-10-26 08:54:01 +02:00
Lofty dd7ea0ab6c qwp: remove 2024-10-25 14:09:58 +01:00
Emil J d1695ad998
Merge pull request #4666 from thorpej/dev/pkgsrc-patch-NetBSD-2 
misc/yosys-config.in: don't use the non-portable '==' operator with test(1)
 2024-10-22 13:10:52 +02:00
Emil J b34e2603ab Makefile: add -rdynamic on macOS to fix plugins with LTO 2024-10-22 12:52:50 +02:00
Emil J f3213d5057 README: tell macOS users to use brew clang with LTO 2024-10-22 12:47:37 +02:00
Emil J 7db4c65970
Merge pull request #4672 from YosysHQ/emil/fix-tcl-args-cxxopts 
driver: fix special args passing to tcl and python
 2024-10-21 15:41:24 +02:00
Emil J c1907ef5b7
Merge pull request #4668 from YosysHQ/emil/vendor-submodules 
actions: vendor sources with submodules for releases
 2024-10-21 15:37:51 +02:00
github-actions[bot] 8c2d1a16d0 Bump version 2024-10-19 00:20:20 +00:00
Emil J. Tywoniak 37e61b993a yosys: fix pyosys initialization segfault 2024-10-18 11:56:13 +02:00
Emil J 799497ebba
Merge pull request #4671 from YosysHQ/emil/const-deref-pyosys 
py_wrap: implement nested class definitions
 2024-10-18 11:46:12 +02:00