mirror of https://github.com/YosysHQ/yosys.git
Clean up private member usage in `passes/cmds/bugpoint.cc`.
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@ -114,8 +114,8 @@ struct BugpointPass : public Pass {
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return design;
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return design;
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RTLIL::Design *design_copy = new RTLIL::Design;
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RTLIL::Design *design_copy = new RTLIL::Design;
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for (auto &it : design->modules_)
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for (auto module : design->modules())
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design_copy->add(it.second->clone());
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design_copy->add(module->clone());
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Pass::call(design_copy, "proc_clean -quiet");
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Pass::call(design_copy, "proc_clean -quiet");
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Pass::call(design_copy, "clean -purge");
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Pass::call(design_copy, "clean -purge");
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@ -127,21 +127,21 @@ struct BugpointPass : public Pass {
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RTLIL::Design *simplify_something(RTLIL::Design *design, int &seed, bool stage2, bool modules, bool ports, bool cells, bool connections, bool assigns, bool updates)
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RTLIL::Design *simplify_something(RTLIL::Design *design, int &seed, bool stage2, bool modules, bool ports, bool cells, bool connections, bool assigns, bool updates)
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{
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{
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RTLIL::Design *design_copy = new RTLIL::Design;
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RTLIL::Design *design_copy = new RTLIL::Design;
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for (auto &it : design->modules_)
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for (auto module : design->modules())
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design_copy->add(it.second->clone());
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design_copy->add(module->clone());
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int index = 0;
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int index = 0;
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if (modules)
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if (modules)
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{
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{
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for (auto &it : design_copy->modules_)
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for (auto module : design_copy->modules())
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{
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{
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if (it.second->get_blackbox_attribute())
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if (module->get_blackbox_attribute())
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continue;
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continue;
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if (index++ == seed)
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if (index++ == seed)
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{
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{
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log("Trying to remove module %s.\n", it.first.c_str());
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log("Trying to remove module %s.\n", module->name.c_str());
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design_copy->remove(it.second);
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design_copy->remove(module);
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return design_copy;
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return design_copy;
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}
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}
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}
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}
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@ -178,12 +178,12 @@ struct BugpointPass : public Pass {
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if (mod->get_blackbox_attribute())
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if (mod->get_blackbox_attribute())
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continue;
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continue;
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for (auto &it : mod->cells_)
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for (auto cell : mod->cells())
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{
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{
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if (index++ == seed)
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if (index++ == seed)
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{
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{
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log("Trying to remove cell %s.%s.\n", mod->name.c_str(), it.first.c_str());
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log("Trying to remove cell %s.%s.\n", mod->name.c_str(), cell->name.c_str());
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mod->remove(it.second);
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mod->remove(cell);
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return design_copy;
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return design_copy;
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}
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}
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}
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}
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@ -285,7 +285,7 @@ struct BugpointPass : public Pass {
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}
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}
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}
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}
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}
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}
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return NULL;
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return nullptr;
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}
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}
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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@ -433,8 +433,8 @@ struct BugpointPass : public Pass {
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{
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{
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Pass::call(design, "design -reset");
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Pass::call(design, "design -reset");
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crashing_design = clean_design(crashing_design, clean, /*do_delete=*/true);
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crashing_design = clean_design(crashing_design, clean, /*do_delete=*/true);
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for (auto &it : crashing_design->modules_)
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for (auto module : crashing_design->modules())
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design->add(it.second->clone());
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design->add(module->clone());
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delete crashing_design;
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delete crashing_design;
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}
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}
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}
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}
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