From afcb86c3d143c95643855da1159b0f245f75262c Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddie@fpgeh.com>
Date: Tue, 16 Apr 2019 13:10:13 -0700
Subject: [PATCH 1/2] abc9 to call "setundef -zero" behaving as for abc

---
 passes/techmap/abc9.cc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc
index edc07092b..3c4919b1f 100644
--- a/passes/techmap/abc9.cc
+++ b/passes/techmap/abc9.cc
@@ -403,6 +403,9 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *current_module, std::stri
 	RTLIL::Selection& sel = design->selection_stack.back();
 	sel.select(module);
 
+	// Behave as for "abc" where BLIF writer implicitly outputs all undef as zero
+	Pass::call(design, "setundef -zero");
+
 	Pass::call(design, "aigmap");
 
 	handle_loops(design);

From 0c8a839f13bf7bc8368625ab55960dd3f219b0d8 Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddie@fpgeh.com>
Date: Tue, 16 Apr 2019 13:10:35 -0700
Subject: [PATCH 2/2] Re-enable partsel.v test

---
 tests/simple_abc9/run-test.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/simple_abc9/run-test.sh b/tests/simple_abc9/run-test.sh
index bf48d007d..af003d52e 100755
--- a/tests/simple_abc9/run-test.sh
+++ b/tests/simple_abc9/run-test.sh
@@ -18,6 +18,5 @@ if ! which iverilog > /dev/null ; then
 fi
 
 cp ../simple/*.v .
-rm partsel.v # FIXME: Contains 1'hx, thus write_xaiger fails
 DOLLAR='?'
 exec ${MAKE:-make} -f ../tools/autotest.mk $seed *.v EXTRA_FLAGS="-p 'hierarchy; synth -run coarse; techmap; opt -full; abc9 -lut 4; stat; check -assert; select -assert-none t:${DOLLAR}_NOT_ t:${DOLLAR}_AND_'"