mirror of https://github.com/YosysHQ/yosys.git
Fix formatting
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53bc499a90
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@ -8,8 +8,10 @@ design -load postopt # load the post-opt design (otherwise equiv_opt loads the p
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cd adff # Constrain all select calls below inside the top module
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select -assert-count 1 t:BUFG
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select -assert-count 1 t:FDCE
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select -assert-none t:BUFG t:FDCE %% t:* %D
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design -load read
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proc
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hierarchy -top adffn
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@ -19,8 +21,10 @@ cd adffn # Constrain all select calls below inside the top module
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select -assert-count 1 t:BUFG
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select -assert-count 1 t:FDCE
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select -assert-count 1 t:LUT1
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select -assert-none t:BUFG t:FDCE t:LUT1 %% t:* %D
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design -load read
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proc
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hierarchy -top dffs
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@ -30,8 +34,10 @@ cd dffs # Constrain all select calls below inside the top module
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select -assert-count 1 t:BUFG
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select -assert-count 1 t:FDRE
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select -assert-count 1 t:LUT2
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select -assert-none t:BUFG t:FDRE t:LUT2 %% t:* %D
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design -load read
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proc
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hierarchy -top ndffnr
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@ -41,4 +47,5 @@ cd ndffnr # Constrain all select calls below inside the top module
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select -assert-count 1 t:BUFG
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select -assert-count 1 t:FDRE_1
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select -assert-count 1 t:LUT2
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select -assert-none t:BUFG t:FDRE_1 t:LUT2 %% t:* %D
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select -assert-none t:BUFG t:FDRE_1 t:LUT2 %% t:* %D
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