mirror of https://github.com/YosysHQ/yosys.git
Merge pull request #1754 from boqwxp/precise_locations
Set AST node source location in more parser rules.
This commit is contained in:
commit
faf4ee69de
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@ -2113,18 +2113,22 @@ simple_behavioral_stmt:
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lvalue '=' delay expr {
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lvalue '=' delay expr {
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AstNode *node = new AstNode(AST_ASSIGN_EQ, $1, $4);
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AstNode *node = new AstNode(AST_ASSIGN_EQ, $1, $4);
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ast_stack.back()->children.push_back(node);
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ast_stack.back()->children.push_back(node);
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SET_AST_NODE_LOC(node, @1, @4);
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} |
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} |
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lvalue TOK_INCREMENT {
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lvalue TOK_INCREMENT {
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AstNode *node = new AstNode(AST_ASSIGN_EQ, $1, new AstNode(AST_ADD, $1->clone(), AstNode::mkconst_int(1, true)));
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AstNode *node = new AstNode(AST_ASSIGN_EQ, $1, new AstNode(AST_ADD, $1->clone(), AstNode::mkconst_int(1, true)));
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ast_stack.back()->children.push_back(node);
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ast_stack.back()->children.push_back(node);
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SET_AST_NODE_LOC(node, @1, @2);
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} |
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} |
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lvalue TOK_DECREMENT {
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lvalue TOK_DECREMENT {
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AstNode *node = new AstNode(AST_ASSIGN_EQ, $1, new AstNode(AST_SUB, $1->clone(), AstNode::mkconst_int(1, true)));
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AstNode *node = new AstNode(AST_ASSIGN_EQ, $1, new AstNode(AST_SUB, $1->clone(), AstNode::mkconst_int(1, true)));
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ast_stack.back()->children.push_back(node);
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ast_stack.back()->children.push_back(node);
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SET_AST_NODE_LOC(node, @1, @2);
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} |
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} |
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lvalue OP_LE delay expr {
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lvalue OP_LE delay expr {
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AstNode *node = new AstNode(AST_ASSIGN_LE, $1, $4);
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AstNode *node = new AstNode(AST_ASSIGN_LE, $1, $4);
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ast_stack.back()->children.push_back(node);
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ast_stack.back()->children.push_back(node);
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SET_AST_NODE_LOC(node, @1, @4);
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};
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};
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// this production creates the obligatory if-else shift/reduce conflict
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// this production creates the obligatory if-else shift/reduce conflict
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@ -2182,6 +2186,7 @@ behavioral_stmt:
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} behavioral_stmt {
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} behavioral_stmt {
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SET_AST_NODE_LOC(ast_stack.back(), @13, @13);
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SET_AST_NODE_LOC(ast_stack.back(), @13, @13);
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ast_stack.pop_back();
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ast_stack.pop_back();
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SET_AST_NODE_LOC(ast_stack.back(), @2, @13);
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ast_stack.pop_back();
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ast_stack.pop_back();
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} |
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} |
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attr TOK_WHILE '(' expr ')' {
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attr TOK_WHILE '(' expr ')' {
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@ -2335,6 +2340,7 @@ gen_case_item:
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ast_stack.push_back(node);
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ast_stack.push_back(node);
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} case_select {
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} case_select {
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case_type_stack.push_back(0);
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case_type_stack.push_back(0);
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SET_AST_NODE_LOC(ast_stack.back(), @2, @2);
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} gen_stmt_or_null {
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} gen_stmt_or_null {
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case_type_stack.pop_back();
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case_type_stack.pop_back();
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ast_stack.pop_back();
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ast_stack.pop_back();
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@ -2346,10 +2352,14 @@ case_select:
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case_expr_list:
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case_expr_list:
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TOK_DEFAULT {
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TOK_DEFAULT {
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ast_stack.back()->children.push_back(new AstNode(AST_DEFAULT));
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AstNode *node = new AstNode(AST_DEFAULT);
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SET_AST_NODE_LOC(node, @1, @1);
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ast_stack.back()->children.push_back(node);
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} |
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} |
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TOK_SVA_LABEL {
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TOK_SVA_LABEL {
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ast_stack.back()->children.push_back(new AstNode(AST_IDENTIFIER));
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AstNode *node = new AstNode(AST_IDENTIFIER);
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SET_AST_NODE_LOC(node, @1, @1);
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ast_stack.back()->children.push_back(node);
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ast_stack.back()->children.back()->str = *$1;
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ast_stack.back()->children.back()->str = *$1;
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delete $1;
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delete $1;
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} |
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} |
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@ -2496,6 +2506,7 @@ expr:
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$$->children.push_back($1);
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$$->children.push_back($1);
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$$->children.push_back($4);
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$$->children.push_back($4);
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$$->children.push_back($6);
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$$->children.push_back($6);
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SET_AST_NODE_LOC($$, @1, @$);
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append_attr($$, $3);
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append_attr($$, $3);
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};
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};
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@ -2518,6 +2529,7 @@ basic_expr:
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frontend_verilog_yyerror("Cast operation must be applied on sized constants, e.g. <ID>\'d0, while %s is not a sized constant.", $2->c_str());
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frontend_verilog_yyerror("Cast operation must be applied on sized constants, e.g. <ID>\'d0, while %s is not a sized constant.", $2->c_str());
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AstNode *bits = new AstNode(AST_IDENTIFIER);
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AstNode *bits = new AstNode(AST_IDENTIFIER);
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bits->str = *$1;
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bits->str = *$1;
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SET_AST_NODE_LOC(bits, @1, @1);
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AstNode *val = const2ast(*$2, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), !lib_mode);
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AstNode *val = const2ast(*$2, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), !lib_mode);
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if (val == NULL)
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if (val == NULL)
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log_error("Value conversion failed: `%s'\n", $2->c_str());
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log_error("Value conversion failed: `%s'\n", $2->c_str());
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@ -2545,6 +2557,7 @@ basic_expr:
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if ((*$1)[j] != '_')
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if ((*$1)[j] != '_')
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p[i++] = (*$1)[j], p[i] = 0;
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p[i++] = (*$1)[j], p[i] = 0;
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$$->realvalue = strtod(p, &q);
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$$->realvalue = strtod(p, &q);
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SET_AST_NODE_LOC($$, @1, @1);
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log_assert(*q == 0);
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log_assert(*q == 0);
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delete $1;
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delete $1;
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free(p);
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free(p);
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@ -2558,6 +2571,7 @@ basic_expr:
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node->str = *$1;
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node->str = *$1;
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delete $1;
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delete $1;
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ast_stack.push_back(node);
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ast_stack.push_back(node);
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SET_AST_NODE_LOC(node, @1, @1);
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append_attr(node, $2);
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append_attr(node, $2);
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} '(' arg_list optional_comma ')' {
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} '(' arg_list optional_comma ')' {
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$$ = ast_stack.back();
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$$ = ast_stack.back();
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@ -2587,148 +2601,185 @@ basic_expr:
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} |
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} |
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'~' attr basic_expr %prec UNARY_OPS {
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'~' attr basic_expr %prec UNARY_OPS {
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$$ = new AstNode(AST_BIT_NOT, $3);
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$$ = new AstNode(AST_BIT_NOT, $3);
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SET_AST_NODE_LOC($$, @1, @3);
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append_attr($$, $2);
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append_attr($$, $2);
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} |
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} |
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basic_expr '&' attr basic_expr {
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basic_expr '&' attr basic_expr {
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$$ = new AstNode(AST_BIT_AND, $1, $4);
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$$ = new AstNode(AST_BIT_AND, $1, $4);
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SET_AST_NODE_LOC($$, @1, @4);
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append_attr($$, $3);
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append_attr($$, $3);
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} |
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} |
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basic_expr OP_NAND attr basic_expr {
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basic_expr OP_NAND attr basic_expr {
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$$ = new AstNode(AST_BIT_NOT, new AstNode(AST_BIT_AND, $1, $4));
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$$ = new AstNode(AST_BIT_NOT, new AstNode(AST_BIT_AND, $1, $4));
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SET_AST_NODE_LOC($$, @1, @4);
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append_attr($$, $3);
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append_attr($$, $3);
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} |
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} |
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basic_expr '|' attr basic_expr {
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basic_expr '|' attr basic_expr {
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$$ = new AstNode(AST_BIT_OR, $1, $4);
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$$ = new AstNode(AST_BIT_OR, $1, $4);
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SET_AST_NODE_LOC($$, @1, @4);
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append_attr($$, $3);
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append_attr($$, $3);
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} |
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} |
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basic_expr OP_NOR attr basic_expr {
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basic_expr OP_NOR attr basic_expr {
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$$ = new AstNode(AST_BIT_NOT, new AstNode(AST_BIT_OR, $1, $4));
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$$ = new AstNode(AST_BIT_NOT, new AstNode(AST_BIT_OR, $1, $4));
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SET_AST_NODE_LOC($$, @1, @4);
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append_attr($$, $3);
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append_attr($$, $3);
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} |
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} |
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basic_expr '^' attr basic_expr {
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basic_expr '^' attr basic_expr {
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$$ = new AstNode(AST_BIT_XOR, $1, $4);
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$$ = new AstNode(AST_BIT_XOR, $1, $4);
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SET_AST_NODE_LOC($$, @1, @4);
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append_attr($$, $3);
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append_attr($$, $3);
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} |
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} |
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basic_expr OP_XNOR attr basic_expr {
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basic_expr OP_XNOR attr basic_expr {
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$$ = new AstNode(AST_BIT_XNOR, $1, $4);
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$$ = new AstNode(AST_BIT_XNOR, $1, $4);
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SET_AST_NODE_LOC($$, @1, @4);
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append_attr($$, $3);
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append_attr($$, $3);
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} |
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} |
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'&' attr basic_expr %prec UNARY_OPS {
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'&' attr basic_expr %prec UNARY_OPS {
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$$ = new AstNode(AST_REDUCE_AND, $3);
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$$ = new AstNode(AST_REDUCE_AND, $3);
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SET_AST_NODE_LOC($$, @1, @3);
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append_attr($$, $2);
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append_attr($$, $2);
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} |
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} |
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OP_NAND attr basic_expr %prec UNARY_OPS {
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OP_NAND attr basic_expr %prec UNARY_OPS {
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$$ = new AstNode(AST_REDUCE_AND, $3);
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$$ = new AstNode(AST_REDUCE_AND, $3);
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SET_AST_NODE_LOC($$, @1, @3);
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append_attr($$, $2);
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append_attr($$, $2);
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$$ = new AstNode(AST_LOGIC_NOT, $$);
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$$ = new AstNode(AST_LOGIC_NOT, $$);
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} |
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} |
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'|' attr basic_expr %prec UNARY_OPS {
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'|' attr basic_expr %prec UNARY_OPS {
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$$ = new AstNode(AST_REDUCE_OR, $3);
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$$ = new AstNode(AST_REDUCE_OR, $3);
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SET_AST_NODE_LOC($$, @1, @3);
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append_attr($$, $2);
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append_attr($$, $2);
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} |
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} |
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OP_NOR attr basic_expr %prec UNARY_OPS {
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OP_NOR attr basic_expr %prec UNARY_OPS {
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$$ = new AstNode(AST_REDUCE_OR, $3);
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$$ = new AstNode(AST_REDUCE_OR, $3);
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SET_AST_NODE_LOC($$, @1, @3);
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append_attr($$, $2);
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append_attr($$, $2);
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$$ = new AstNode(AST_LOGIC_NOT, $$);
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$$ = new AstNode(AST_LOGIC_NOT, $$);
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SET_AST_NODE_LOC($$, @1, @3);
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} |
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} |
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'^' attr basic_expr %prec UNARY_OPS {
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'^' attr basic_expr %prec UNARY_OPS {
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$$ = new AstNode(AST_REDUCE_XOR, $3);
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$$ = new AstNode(AST_REDUCE_XOR, $3);
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SET_AST_NODE_LOC($$, @1, @3);
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append_attr($$, $2);
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append_attr($$, $2);
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} |
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} |
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OP_XNOR attr basic_expr %prec UNARY_OPS {
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OP_XNOR attr basic_expr %prec UNARY_OPS {
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$$ = new AstNode(AST_REDUCE_XNOR, $3);
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$$ = new AstNode(AST_REDUCE_XNOR, $3);
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SET_AST_NODE_LOC($$, @1, @3);
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append_attr($$, $2);
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append_attr($$, $2);
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} |
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} |
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basic_expr OP_SHL attr basic_expr {
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basic_expr OP_SHL attr basic_expr {
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$$ = new AstNode(AST_SHIFT_LEFT, $1, new AstNode(AST_TO_UNSIGNED, $4));
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$$ = new AstNode(AST_SHIFT_LEFT, $1, new AstNode(AST_TO_UNSIGNED, $4));
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SET_AST_NODE_LOC($$, @1, @4);
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append_attr($$, $3);
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append_attr($$, $3);
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} |
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} |
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basic_expr OP_SHR attr basic_expr {
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basic_expr OP_SHR attr basic_expr {
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$$ = new AstNode(AST_SHIFT_RIGHT, $1, new AstNode(AST_TO_UNSIGNED, $4));
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$$ = new AstNode(AST_SHIFT_RIGHT, $1, new AstNode(AST_TO_UNSIGNED, $4));
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SET_AST_NODE_LOC($$, @1, @4);
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append_attr($$, $3);
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append_attr($$, $3);
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} |
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} |
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basic_expr OP_SSHL attr basic_expr {
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basic_expr OP_SSHL attr basic_expr {
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$$ = new AstNode(AST_SHIFT_SLEFT, $1, new AstNode(AST_TO_UNSIGNED, $4));
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$$ = new AstNode(AST_SHIFT_SLEFT, $1, new AstNode(AST_TO_UNSIGNED, $4));
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SET_AST_NODE_LOC($$, @1, @4);
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append_attr($$, $3);
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append_attr($$, $3);
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} |
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} |
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basic_expr OP_SSHR attr basic_expr {
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basic_expr OP_SSHR attr basic_expr {
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$$ = new AstNode(AST_SHIFT_SRIGHT, $1, new AstNode(AST_TO_UNSIGNED, $4));
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$$ = new AstNode(AST_SHIFT_SRIGHT, $1, new AstNode(AST_TO_UNSIGNED, $4));
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SET_AST_NODE_LOC($$, @1, @4);
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append_attr($$, $3);
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append_attr($$, $3);
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} |
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} |
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basic_expr '<' attr basic_expr {
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basic_expr '<' attr basic_expr {
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$$ = new AstNode(AST_LT, $1, $4);
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$$ = new AstNode(AST_LT, $1, $4);
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SET_AST_NODE_LOC($$, @1, @4);
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append_attr($$, $3);
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append_attr($$, $3);
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} |
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} |
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basic_expr OP_LE attr basic_expr {
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basic_expr OP_LE attr basic_expr {
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$$ = new AstNode(AST_LE, $1, $4);
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$$ = new AstNode(AST_LE, $1, $4);
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SET_AST_NODE_LOC($$, @1, @4);
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append_attr($$, $3);
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append_attr($$, $3);
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} |
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} |
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basic_expr OP_EQ attr basic_expr {
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basic_expr OP_EQ attr basic_expr {
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$$ = new AstNode(AST_EQ, $1, $4);
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$$ = new AstNode(AST_EQ, $1, $4);
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SET_AST_NODE_LOC($$, @1, @4);
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append_attr($$, $3);
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append_attr($$, $3);
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} |
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} |
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basic_expr OP_NE attr basic_expr {
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basic_expr OP_NE attr basic_expr {
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$$ = new AstNode(AST_NE, $1, $4);
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$$ = new AstNode(AST_NE, $1, $4);
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SET_AST_NODE_LOC($$, @1, @4);
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append_attr($$, $3);
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append_attr($$, $3);
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} |
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} |
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basic_expr OP_EQX attr basic_expr {
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basic_expr OP_EQX attr basic_expr {
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$$ = new AstNode(AST_EQX, $1, $4);
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$$ = new AstNode(AST_EQX, $1, $4);
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SET_AST_NODE_LOC($$, @1, @4);
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append_attr($$, $3);
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append_attr($$, $3);
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} |
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} |
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basic_expr OP_NEX attr basic_expr {
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basic_expr OP_NEX attr basic_expr {
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$$ = new AstNode(AST_NEX, $1, $4);
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$$ = new AstNode(AST_NEX, $1, $4);
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||||||
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SET_AST_NODE_LOC($$, @1, @4);
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||||||
append_attr($$, $3);
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append_attr($$, $3);
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||||||
} |
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} |
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basic_expr OP_GE attr basic_expr {
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basic_expr OP_GE attr basic_expr {
|
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$$ = new AstNode(AST_GE, $1, $4);
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$$ = new AstNode(AST_GE, $1, $4);
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SET_AST_NODE_LOC($$, @1, @4);
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||||||
append_attr($$, $3);
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append_attr($$, $3);
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||||||
} |
|
} |
|
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basic_expr '>' attr basic_expr {
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basic_expr '>' attr basic_expr {
|
||||||
$$ = new AstNode(AST_GT, $1, $4);
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$$ = new AstNode(AST_GT, $1, $4);
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||||||
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SET_AST_NODE_LOC($$, @1, @4);
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||||||
append_attr($$, $3);
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append_attr($$, $3);
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||||||
} |
|
} |
|
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basic_expr '+' attr basic_expr {
|
basic_expr '+' attr basic_expr {
|
||||||
$$ = new AstNode(AST_ADD, $1, $4);
|
$$ = new AstNode(AST_ADD, $1, $4);
|
||||||
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SET_AST_NODE_LOC($$, @1, @4);
|
||||||
append_attr($$, $3);
|
append_attr($$, $3);
|
||||||
} |
|
} |
|
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basic_expr '-' attr basic_expr {
|
basic_expr '-' attr basic_expr {
|
||||||
$$ = new AstNode(AST_SUB, $1, $4);
|
$$ = new AstNode(AST_SUB, $1, $4);
|
||||||
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SET_AST_NODE_LOC($$, @1, @4);
|
||||||
append_attr($$, $3);
|
append_attr($$, $3);
|
||||||
} |
|
} |
|
||||||
basic_expr '*' attr basic_expr {
|
basic_expr '*' attr basic_expr {
|
||||||
$$ = new AstNode(AST_MUL, $1, $4);
|
$$ = new AstNode(AST_MUL, $1, $4);
|
||||||
|
SET_AST_NODE_LOC($$, @1, @4);
|
||||||
append_attr($$, $3);
|
append_attr($$, $3);
|
||||||
} |
|
} |
|
||||||
basic_expr '/' attr basic_expr {
|
basic_expr '/' attr basic_expr {
|
||||||
$$ = new AstNode(AST_DIV, $1, $4);
|
$$ = new AstNode(AST_DIV, $1, $4);
|
||||||
|
SET_AST_NODE_LOC($$, @1, @4);
|
||||||
append_attr($$, $3);
|
append_attr($$, $3);
|
||||||
} |
|
} |
|
||||||
basic_expr '%' attr basic_expr {
|
basic_expr '%' attr basic_expr {
|
||||||
$$ = new AstNode(AST_MOD, $1, $4);
|
$$ = new AstNode(AST_MOD, $1, $4);
|
||||||
|
SET_AST_NODE_LOC($$, @1, @4);
|
||||||
append_attr($$, $3);
|
append_attr($$, $3);
|
||||||
} |
|
} |
|
||||||
basic_expr OP_POW attr basic_expr {
|
basic_expr OP_POW attr basic_expr {
|
||||||
$$ = new AstNode(AST_POW, $1, $4);
|
$$ = new AstNode(AST_POW, $1, $4);
|
||||||
|
SET_AST_NODE_LOC($$, @1, @4);
|
||||||
append_attr($$, $3);
|
append_attr($$, $3);
|
||||||
} |
|
} |
|
||||||
'+' attr basic_expr %prec UNARY_OPS {
|
'+' attr basic_expr %prec UNARY_OPS {
|
||||||
$$ = new AstNode(AST_POS, $3);
|
$$ = new AstNode(AST_POS, $3);
|
||||||
|
SET_AST_NODE_LOC($$, @1, @3);
|
||||||
append_attr($$, $2);
|
append_attr($$, $2);
|
||||||
} |
|
} |
|
||||||
'-' attr basic_expr %prec UNARY_OPS {
|
'-' attr basic_expr %prec UNARY_OPS {
|
||||||
$$ = new AstNode(AST_NEG, $3);
|
$$ = new AstNode(AST_NEG, $3);
|
||||||
|
SET_AST_NODE_LOC($$, @1, @3);
|
||||||
append_attr($$, $2);
|
append_attr($$, $2);
|
||||||
} |
|
} |
|
||||||
basic_expr OP_LAND attr basic_expr {
|
basic_expr OP_LAND attr basic_expr {
|
||||||
$$ = new AstNode(AST_LOGIC_AND, $1, $4);
|
$$ = new AstNode(AST_LOGIC_AND, $1, $4);
|
||||||
|
SET_AST_NODE_LOC($$, @1, @4);
|
||||||
append_attr($$, $3);
|
append_attr($$, $3);
|
||||||
} |
|
} |
|
||||||
basic_expr OP_LOR attr basic_expr {
|
basic_expr OP_LOR attr basic_expr {
|
||||||
$$ = new AstNode(AST_LOGIC_OR, $1, $4);
|
$$ = new AstNode(AST_LOGIC_OR, $1, $4);
|
||||||
|
SET_AST_NODE_LOC($$, @1, @4);
|
||||||
append_attr($$, $3);
|
append_attr($$, $3);
|
||||||
} |
|
} |
|
||||||
'!' attr basic_expr %prec UNARY_OPS {
|
'!' attr basic_expr %prec UNARY_OPS {
|
||||||
$$ = new AstNode(AST_LOGIC_NOT, $3);
|
$$ = new AstNode(AST_LOGIC_NOT, $3);
|
||||||
|
SET_AST_NODE_LOC($$, @1, @3);
|
||||||
append_attr($$, $2);
|
append_attr($$, $2);
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,8 @@
|
||||||
|
logger -expect warning "wire '\\o' is assigned in a block at <<EOT:2.11-2.17" 1
|
||||||
|
logger -expect warning "wire '\\p' is assigned in a block at <<EOT:3.11-3.16" 1
|
||||||
|
read_verilog <<EOT
|
||||||
|
module top(input i, output o, p);
|
||||||
|
always @* o <= i;
|
||||||
|
always @* p = i;
|
||||||
|
endmodule
|
||||||
|
EOT
|
Loading…
Reference in New Issue