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mem: only import attributes from ports if the memory doesn't have them yet

This commit is contained in:
N. Engelhardt 2023-10-30 16:30:34 +01:00
parent 080da693d1
commit f9ab6e147a
1 changed files with 6 additions and 3 deletions
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3
kernel/mem.cc
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@ -149,6 +149,7 @@ void Mem::emit() {
wr_port_xlat.push_back(i);
for (auto &port : rd_ports) {
for (auto attr: port.attributes)
if (!cell->has_attribute(attr.first))
cell->attributes.insert(attr);
if (port.cell) {
module->remove(port.cell);
@ -213,6 +214,7 @@ void Mem::emit() {
cell->setPort(ID::RD_DATA, rd_data);
for (auto &port : wr_ports) {
for (auto attr: port.attributes)
if (!cell->has_attribute(attr.first))
cell->attributes.insert(attr);
if (port.cell) {
module->remove(port.cell);
@ -251,6 +253,7 @@ void Mem::emit() {
cell->setPort(ID::WR_DATA, wr_data);
for (auto &init : inits) {
for (auto attr: init.attributes)
if (!cell->has_attribute(attr.first))
cell->attributes.insert(attr);
if (init.cell) {
module->remove(init.cell);