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Another typo

This commit is contained in:
Eddie Hung 2019-07-10 22:33:35 -07:00
parent 375fcbe511
commit f984e0cb34
1 changed files with 1 additions and 1 deletions
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techlibs/xilinx/abc_ff.v
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@ -112,7 +112,7 @@ module FDPE (output reg Q, input C, CE, D, PRE);
\$__ABC_FD_ASYNC_MUX abc_async_mux (.A(1'b1), .B(\$currQ ), .S(PRE), .Y(Q)); \$__ABC_FD_ASYNC_MUX abc_async_mux (.A(1'b1), .B(\$currQ ), .S(PRE), .Y(Q));
endgenerate endgenerate
endmodule endmodule
module FDPE_1 (output reg Q, input C, CE, D, CLR); module FDPE_1 (output reg Q, input C, CE, D, PRE);
parameter [0:0] INIT = 1'b0; parameter [0:0] INIT = 1'b0;
wire \$nextQ , \$currQ ; wire \$nextQ , \$currQ ;
\$__ABC_FDPE_1 #( \$__ABC_FDPE_1 #(