diff --git a/passes/opt/opt_expr.cc b/passes/opt/opt_expr.cc
index 9d5ca4ef9..46773a344 100644
--- a/passes/opt/opt_expr.cc
+++ b/passes/opt/opt_expr.cc
@@ -2165,7 +2165,7 @@ skip_alu_split:
 					{
 						condition   = "signed X>=0";
 						replacement = stringf("X[%d]", var_width - 1);
-						module->addNot(NEW_ID, var_sig[var_width - 1], cell->getPort(ID::Y));
+						module->addLogicNot(NEW_ID, var_sig[var_width - 1], cell->getPort(ID::Y));
 						remove = true;
 					}
 				}
diff --git a/tests/opt/bug3867.ys b/tests/opt/bug3867.ys
new file mode 100644
index 000000000..9c4359a78
--- /dev/null
+++ b/tests/opt/bug3867.ys
@@ -0,0 +1,7 @@
+read_verilog <<EOF
+module test (input signed [4:0] i, output [5:0] o);
+assign o = (i >= 0);
+endmodule
+EOF
+
+equiv_opt -assert opt_expr -fine