diff --git a/passes/techmap/pmux2shiftx.cc b/passes/techmap/pmux2shiftx.cc
index 08cb06d5f..f8cdf5783 100644
--- a/passes/techmap/pmux2shiftx.cc
+++ b/passes/techmap/pmux2shiftx.cc
@@ -62,7 +62,6 @@ struct Pmux2ShiftxPass : public Pass {
 				shiftx_a.append(cell->getPort("\\A"));
 				pmux_s.append(module->Not(NEW_ID, module->ReduceOr(NEW_ID, cell->getPort("\\S"))));
 			}
-			const int width = cell->getParam("\\WIDTH").as_int();
 			const int clog2width = ceil(log2(s_width));
 
 			RTLIL::SigSpec pmux_b;