mirror of https://github.com/YosysHQ/yosys.git
sim: Bail if there are blackboxes in simulation
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51ef942547
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@ -188,6 +188,10 @@ struct SimInstance
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{
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{
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log_assert(module);
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log_assert(module);
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if (module->get_blackbox_attribute(true))
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log_error("Cannot simulate blackbox module %s (instanced at %s).\n",
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log_id(module->name), hiername().c_str());
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if (parent) {
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if (parent) {
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log_assert(parent->children.count(instance) == 0);
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log_assert(parent->children.count(instance) == 0);
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parent->children[instance] = this;
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parent->children[instance] = this;
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