mirror of https://github.com/YosysHQ/yosys.git
Added examples/ top-level directory
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@ -342,10 +342,10 @@ Then with default config setting:
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./yosys -p 'synth; show' tests/simple/fiedler-cooley.v
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./yosys -p 'synth_xilinx -top up3down5; show' tests/simple/fiedler-cooley.v
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cd ~yosys/techlibs/cmos
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cd ~yosys/examples/cmos
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bash testbench.sh
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cd ~yosys/techlibs/xilinx/example_basys3
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cd ~yosys/examples/basys3
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bash run.sh
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2
README
2
README
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@ -190,7 +190,7 @@ for the given cell library:
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clean
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If you do not have a liberty file but want to test this synthesis script,
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you can use the file techlibs/cmos/cmos_cells.lib from the yosys sources.
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you can use the file examples/cmos/cmos_cells.lib from the yosys sources.
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Various more complex liberty files (for testing) can be found here:
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@ -2,6 +2,9 @@
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A simple example design, based on the Digilent BASYS3 board
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===========================================================
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This example uses Yosys for synthesis and Xilinx Vivado
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for place&route and bit-stream creation.
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Running Yosys:
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yosys run_yosys.ys
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@ -1,5 +1,5 @@
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// Note: Set ENABLE_LIBYOSYS=1 in Makefile or Makefile.conf to build libyosys.so
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// yosys-config --exec --cxx -o example --cxxflags --ldflags example.cc -lyosys -lstdc++
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// yosys-config --exec --cxx -o demomain --cxxflags --ldflags demomain.cc -lyosys -lstdc++
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#include <kernel/yosys.h>
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