mirror of https://github.com/YosysHQ/yosys.git
Bugfix in partsel.v signed indices test cases
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
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@ -89,7 +89,7 @@ module partsel_test005 (
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endmodule
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endmodule
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module partsel_test006 (
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module partsel_test006 (
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input [31:0] din,
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input [31:-32] din,
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input signed [4:0] n,
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input signed [4:0] n,
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output reg [31:-32] dout
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output reg [31:-32] dout
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);
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);
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@ -101,7 +101,7 @@ endmodule
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module partsel_test007 (
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module partsel_test007 (
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input [31:0] din,
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input [31:-32] din,
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input signed [4:0] n,
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input signed [4:0] n,
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output reg [31:-32] dout
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output reg [31:-32] dout
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);
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);
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