Cleanups in igloo2 example design

Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
Clifford Wolf 2019-01-17 14:54:04 +01:00
parent db5765b443
commit f3556e9f7a
6 changed files with 4 additions and 7 deletions

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# Add placement constraints here

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# Add timing constraints here

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read_verilog example.v
synth_sf2 -top example -edif netlist.edn
write_verilog netlist.vm

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@ -14,14 +14,12 @@ new_project \
import_files -hdl_source {netlist.vm}
import_files -sdc {example.sdc}
import_files -io_pdc {example.io.pdc}
import_files -fp_pdc {example.fp.pdc}
import_files -io_pdc {example.pdc}
set_option -synth 0
organize_tool_files -tool PLACEROUTE \
-file {proj/constraint/example.sdc} \
-file {proj/constraint/io/example.io.pdc} \
-file {proj/constraint/fp/example.fp.pdc} \
-file {proj/constraint/io/example.pdc} \
-input_type constraint
organize_tool_files -tool VERIFYTIMING \