mirror of https://github.com/YosysHQ/yosys.git
Merge pull request #843 from YosysHQ/clifford/mem2regconstidx
Use mem2reg on memories that only have constant-index write ports
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commit
f2f5ecd834
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@ -214,6 +214,8 @@ namespace AST
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MEM2REG_FL_SET_ASYNC = 0x00000800,
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MEM2REG_FL_EQ2 = 0x00001000,
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MEM2REG_FL_CMPLX_LHS = 0x00002000,
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MEM2REG_FL_CONST_LHS = 0x00004000,
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MEM2REG_FL_VAR_LHS = 0x00008000,
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/* proc flags */
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MEM2REG_FL_EQ1 = 0x01000000,
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@ -113,6 +113,9 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
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if (memflags & AstNode::MEM2REG_FL_CMPLX_LHS)
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goto verbose_activate;
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if ((memflags & AstNode::MEM2REG_FL_CONST_LHS) && !(memflags & AstNode::MEM2REG_FL_VAR_LHS))
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goto verbose_activate;
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// log("Note: Not replacing memory %s with list of registers (flags=0x%08lx).\n", mem->str.c_str(), long(memflags));
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continue;
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@ -2936,6 +2939,14 @@ void AstNode::mem2reg_as_needed_pass1(dict<AstNode*, pool<std::string>> &mem2reg
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proc_flags[mem] |= AstNode::MEM2REG_FL_EQ1;
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}
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// remember if this is a constant index or not
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if (children[0]->children.size() && children[0]->children[0]->type == AST_RANGE && children[0]->children[0]->children.size()) {
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if (children[0]->children[0]->children[0]->type == AST_CONSTANT)
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mem2reg_candidates[mem] |= AstNode::MEM2REG_FL_CONST_LHS;
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else
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mem2reg_candidates[mem] |= AstNode::MEM2REG_FL_VAR_LHS;
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}
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// remember where this is
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if (flags & MEM2REG_FL_INIT) {
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if (!(mem2reg_candidates[mem] & AstNode::MEM2REG_FL_SET_INIT))
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