mirror of https://github.com/YosysHQ/yosys.git
cxxrtl: don't crash generating debug information for unused wires.
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parent
2b62b5ef34
commit
f14074d2c2
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@ -2578,6 +2578,7 @@ struct CxxrtlWorker {
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for (auto wire : module->wires()) {
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for (auto wire : module->wires()) {
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const auto &wire_type = wire_types[wire];
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const auto &wire_type = wire_types[wire];
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auto &debug_wire_type = debug_wire_types[wire];
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auto &debug_wire_type = debug_wire_types[wire];
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if (wire_type.type == WireType::UNUSED) continue;
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if (!wire->name.isPublic()) continue;
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if (!wire->name.isPublic()) continue;
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if (!debug_info) continue;
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if (!debug_info) continue;
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@ -2622,19 +2623,19 @@ struct CxxrtlWorker {
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if (debug_wire_types[wire].is_outline())
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if (debug_wire_types[wire].is_outline())
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worklist.insert(node); // node drives outline
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worklist.insert(node); // node drives outline
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}
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}
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dict<const RTLIL::Wire*, pool<FlowGraph::Node*, hash_ptr_ops>> live_wires;
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dict<const RTLIL::Wire*, pool<FlowGraph::Node*, hash_ptr_ops>> debug_live_wires;
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pool<FlowGraph::Node*, hash_ptr_ops> live_nodes;
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pool<FlowGraph::Node*, hash_ptr_ops> debug_live_nodes;
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while (!worklist.empty()) {
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while (!worklist.empty()) {
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auto node = worklist.pop();
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auto node = worklist.pop();
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live_nodes.insert(node);
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debug_live_nodes.insert(node);
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for (auto wire : flow.node_uses[node]) {
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for (auto wire : flow.node_uses[node]) {
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if (debug_wire_types[wire].is_member())
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if (debug_wire_types[wire].is_member())
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continue; // node uses member
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continue; // node uses member
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if (debug_wire_types[wire].is_exact())
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if (debug_wire_types[wire].is_exact())
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continue; // node uses alias or const
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continue; // node uses alias or const
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live_wires[wire].insert(node);
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debug_live_wires[wire].insert(node);
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for (auto pred_node : flow.wire_comb_defs[wire])
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for (auto pred_node : flow.wire_comb_defs[wire])
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if (!live_nodes[pred_node])
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if (!debug_live_nodes[pred_node])
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worklist.insert(pred_node);
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worklist.insert(pred_node);
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}
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}
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}
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}
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@ -2646,9 +2647,9 @@ struct CxxrtlWorker {
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auto &debug_wire_type = debug_wire_types[wire];
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auto &debug_wire_type = debug_wire_types[wire];
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if (wire->name.isPublic()) continue;
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if (wire->name.isPublic()) continue;
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if (live_wires[wire].empty()) {
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if (live_wires[wire].empty() || debug_live_wires[wire].empty()) {
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continue; // wire never used
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continue; // wire never used
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} else if (flow.is_inlinable(wire, live_wires[wire])) {
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} else if (flow.is_inlinable(wire, debug_live_wires[wire])) {
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log_assert(flow.wire_comb_defs[wire].size() == 1);
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log_assert(flow.wire_comb_defs[wire].size() == 1);
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FlowGraph::Node *node = *flow.wire_comb_defs[wire].begin();
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FlowGraph::Node *node = *flow.wire_comb_defs[wire].begin();
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switch (node->type) {
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switch (node->type) {
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@ -2661,7 +2662,7 @@ struct CxxrtlWorker {
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break;
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break;
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default: continue;
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default: continue;
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}
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}
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live_nodes.erase(node);
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debug_live_nodes.erase(node);
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} else if (wire_type.is_local()) {
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} else if (wire_type.is_local()) {
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debug_wire_type = {WireType::LOCAL}; // wire not inlinable
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debug_wire_type = {WireType::LOCAL}; // wire not inlinable
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} else {
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} else {
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@ -2672,7 +2673,7 @@ struct CxxrtlWorker {
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// Emit reachable nodes in debug_eval().
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// Emit reachable nodes in debug_eval().
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for (auto node : node_order)
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for (auto node : node_order)
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if (live_nodes[node])
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if (debug_live_nodes[node])
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debug_schedule[module].push_back(*node);
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debug_schedule[module].push_back(*node);
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}
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}
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}
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}
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