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Merge pull request #1121 from YosysHQ/ecp5-ccu2c-inv
ecp5: Improve mapping of $alu when BI is used
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commit
f0955452ae
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@ -50,20 +50,21 @@ module _80_ecp5_alu (A, B, CI, BI, X, Y, CO);
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wire [Y_WIDTH2-1:0] AA = A_buf;
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wire [Y_WIDTH2-1:0] AA = A_buf;
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wire [Y_WIDTH2-1:0] BB = BI ? ~B_buf : B_buf;
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wire [Y_WIDTH2-1:0] BB = BI ? ~B_buf : B_buf;
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wire [Y_WIDTH2-1:0] BX = B_buf;
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wire [Y_WIDTH2-1:0] C = {CO, CI};
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wire [Y_WIDTH2-1:0] C = {CO, CI};
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wire [Y_WIDTH2-1:0] FCO, Y1;
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wire [Y_WIDTH2-1:0] FCO, Y1;
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genvar i;
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genvar i;
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generate for (i = 0; i < Y_WIDTH2; i = i + 2) begin:slice
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generate for (i = 0; i < Y_WIDTH2; i = i + 2) begin:slice
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CCU2C #(
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CCU2C #(
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.INIT0(16'b0110011010101010),
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.INIT0(16'b1001011010101010),
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.INIT1(16'b0110011010101010),
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.INIT1(16'b1001011010101010),
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.INJECT1_0("NO"),
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.INJECT1_0("NO"),
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.INJECT1_1("NO")
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.INJECT1_1("NO")
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) ccu2c_i (
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) ccu2c_i (
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.CIN(C[i]),
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.CIN(C[i]),
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.A0(AA[i]), .B0(BB[i]), .C0(1'b0), .D0(1'b1),
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.A0(AA[i]), .B0(BX[i]), .C0(BI), .D0(1'b1),
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.A1(AA[i+1]), .B1(BB[i+1]), .C1(1'b0), .D1(1'b1),
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.A1(AA[i+1]), .B1(BX[i+1]), .C1(BI), .D1(1'b1),
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.S0(Y[i]), .S1(Y1[i]),
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.S0(Y[i]), .S1(Y1[i]),
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.COUT(FCO[i])
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.COUT(FCO[i])
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);
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);
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