mirror of https://github.com/YosysHQ/yosys.git
initialize more registers in setundef -init
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caad497839
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f06cb75b93
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@ -404,22 +404,29 @@ struct SetundefPass : public Pass {
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initwires.insert(wire);
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}
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for (int wire_types = 0; wire_types < 2; wire_types++)
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for (auto wire : module->wires())
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{
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if (wire->name[0] == (wire_types ? '\\' : '$'))
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for (int wire_types = 0; wire_types < 2; wire_types++) {
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pool<SigBit> ffbitsToErase;
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for (auto wire : module->wires()) {
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if (wire->name[0] == (wire_types ? '\\' : '$')) {
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next_wire:
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continue;
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}
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for (auto bit : sigmap(wire))
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if (!ffbits.count(bit))
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if (!ffbits.count(bit)) {
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goto next_wire;
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}
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for (auto bit : sigmap(wire))
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ffbits.erase(bit);
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for (auto bit : sigmap(wire)) {
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ffbitsToErase.insert(bit);
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}
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initwires.insert(wire);
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}
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for (const auto &bit : ffbitsToErase) {
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ffbits.erase(bit);
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}
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}
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for (auto wire : initwires)
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{
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