diff --git a/passes/cmds/rename.cc b/passes/cmds/rename.cc index 45576c91c..6bd317ed0 100644 --- a/passes/cmds/rename.cc +++ b/passes/cmds/rename.cc @@ -116,6 +116,8 @@ static bool rename_witness(RTLIL::Design *design, dict &ca } cache.emplace(module, -1); + std::vector> renames; + bool has_witness_signals = false; for (auto cell : module->cells()) { @@ -130,8 +132,9 @@ static bool rename_witness(RTLIL::Design *design, dict &ca c = '_'; auto new_id = module->uniquify("\\_witness_." + name); cell->set_hdlname_attribute({ "_witness_", strstr(new_id.c_str(), ".") + 1 }); - module->rename(cell, new_id); + renames.emplace_back(cell, new_id); } + break; } if (cell->type.in(ID($anyconst), ID($anyseq), ID($anyinit), ID($allconst), ID($allseq))) { @@ -155,6 +158,9 @@ static bool rename_witness(RTLIL::Design *design, dict &ca } } } + for (auto rename : renames) { + module->rename(rename.first, rename.second); + } cache[module] = has_witness_signals; return has_witness_signals;