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mul2dsp: Fix typo
Signed-off-by: David Shah <dave@ds0.me>
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@ -227,7 +227,7 @@ module \$__mul_gen (A, B, Y);
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if (Y_WIDTH < A_WIDTH+B_WIDTH)
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assign Y = out[Y_WIDTH-1:0];
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else begin
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wire Ysign = (A_SIGNED || B_SIGNED ? out[A_WIDTH+BWIDTH-1] : 1'b0);
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wire Ysign = (A_SIGNED || B_SIGNED ? out[A_WIDTH+B_WIDTH-1] : 1'b0);
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assign Y = { {{Y_WIDTH-(A_WIDTH+B_WIDTH)}{Ysign}}, out[A_WIDTH+B_WIDTH-1:0] };
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end
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end
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