Merge pull request #4779 from YosysHQ/emil/han-carlson-adder

Add a Han-Carlson option for `$lcu` mapping
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Emil J 2024-11-29 10:13:39 +01:00 committed by GitHub
commit e436cc053f
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8 changed files with 120 additions and 3 deletions

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@ -36,3 +36,4 @@ $(eval $(call add_share_file,share,techlibs/common/abc9_unmap.v))
$(eval $(call add_share_file,share,techlibs/common/cmp2lcu.v))
$(eval $(call add_share_file,share,techlibs/common/cmp2softlogic.v))
$(eval $(call add_share_file,share/choices,techlibs/common/choices/kogge-stone.v))
$(eval $(call add_share_file,share/choices,techlibs/common/choices/han-carlson.v))

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@ -0,0 +1,57 @@
(* techmap_celltype = "$lcu" *)
module _80_lcu_han_carlson (P, G, CI, CO);
parameter WIDTH = 2;
(* force_downto *)
input [WIDTH-1:0] P, G;
input CI;
(* force_downto *)
output [WIDTH-1:0] CO;
integer i, j;
(* force_downto *)
reg [WIDTH-1:0] p, g;
always @* begin
i = 0;
p = P;
g = G;
// in almost all cases CI will be constant zero
g[0] = g[0] | (p[0] & CI);
if (i < $clog2(WIDTH)) begin
// First layer: BK
for (j = WIDTH - 1; j >= 0; j = j - 1) begin
if (j % 2 == 1) begin
g[j] = g[j] | p[j] & g[j - 1];
p[j] = p[j] & p[j - 1];
end
end
// Inner (log(WIDTH) - 1) layers: KS
for (i = 1; i < $clog2(WIDTH); i = i + 1) begin
for (j = WIDTH - 1; j >= 2**i; j = j - 1) begin
if (j % 2 == 1) begin
g[j] = g[j] | p[j] & g[j - 2**i];
p[j] = p[j] & p[j - 2**i];
end
end
end
// Last layer: BK
if (i < ($clog2(WIDTH) + 1)) begin
for (j = WIDTH - 1; j >= 0; j = j - 1) begin
if ((j % 2 == 0) && (j > 0)) begin
g[j] = g[j] | p[j] & g[j - 1];
p[j] = p[j] & p[j - 1];
end
end
end
end
end
assign CO = g;
endmodule

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@ -20,6 +20,13 @@ generate_ys_test() {
generate_target "$ys_file" "\"$YOSYS_BASEDIR/yosys\" -ql ${ys_file%.*}.log $yosys_args_ $ys_file"
}
# $ generate_tcl_test tcl_file [yosys_args]
generate_tcl_test() {
tcl_file=$1
yosys_args_=${2:-}
generate_target "$tcl_file" "\"$YOSYS_BASEDIR/yosys\" -ql ${tcl_file%.*}.log $yosys_args_ $tcl_file"
}
# $ generate_bash_test bash_file
generate_bash_test() {
bash_file=$1
@ -29,6 +36,7 @@ generate_bash_test() {
# $ generate_tests [-y|--yosys-scripts] [-s|--prove-sv] [-b|--bash] [-a|--yosys-args yosys_args]
generate_tests() {
do_ys=false
do_tcl=false
do_sv=false
do_sh=false
yosys_args=""
@ -40,6 +48,10 @@ generate_tests() {
do_ys=true
shift
;;
-t|--tcl-scripts)
do_tcl=true
shift
;;
-s|--prove-sv)
do_sv=true
shift
@ -59,7 +71,7 @@ generate_tests() {
esac
done
if [[ ! ( $do_ys = true || $do_sv = true || $do_sh = true ) ]]; then
if [[ ! ( $do_ys = true || $do_tcl = true || $do_sv = true || $do_sh = true ) ]]; then
echo >&2 "Error: No file types selected"
exit 1
fi
@ -72,6 +84,11 @@ generate_tests() {
generate_ys_test "$x" "$yosys_args"
done
fi;
if [[ $do_tcl = true ]]; then
for x in *.tcl; do
generate_tcl_test "$x" "$yosys_args"
done
fi;
if [[ $do_sv = true ]]; then
for x in *.sv; do
if [ ! -f "${x%.sv}.ys" ]; then

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@ -0,0 +1,15 @@
yosys -import
read_verilog +/choices/han-carlson.v
read_verilog -icells lcu_refined.v
design -save init
for {set i 1} {$i <= 16} {incr i} {
design -load init
chparam -set WIDTH $i
yosys proc
opt_clean
equiv_make lcu _80_lcu_han_carlson equiv
equiv_simple equiv
equiv_status -assert equiv
}

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@ -0,0 +1,15 @@
yosys -import
read_verilog +/choices/kogge-stone.v
read_verilog -icells lcu_refined.v
design -save init
for {set i 1} {$i <= 16} {incr i} {
design -load init
chparam -set WIDTH $i
yosys proc
opt_clean
equiv_make lcu _80_lcu_kogge_stone equiv
equiv_simple equiv
equiv_status -assert equiv
}

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@ -1 +0,0 @@
test_cell -s 1711533949 -n 10 -map +/techmap.v -map +/choices/kogge-stone.v $lcu

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@ -0,0 +1,13 @@
module lcu (P, G, CI, CO);
parameter WIDTH = 2;
input [WIDTH-1:0] P, G;
input CI;
output [WIDTH-1:0] CO;
reg [WIDTH-1:0] p, g;
\$lcu #(.WIDTH(WIDTH)) impl (.P(P), .G(G), .CI(CI), .CO(CO));
endmodule

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@ -1,4 +1,4 @@
#!/usr/bin/env bash
set -eu
source ../gen-tests-makefile.sh
run_tests --yosys-scripts --bash --yosys-args "-e 'select out of bounds'"
run_tests --yosys-scripts --tcl-scripts --bash --yosys-args "-e 'select out of bounds'"